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author | Matthias Welwarsky <matthias.welwarsky@sysgo.com> | 2016-10-21 16:59:28 +0200 |
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committer | Matthias Welwarsky <matthias.welwarsky@sysgo.com> | 2017-02-10 14:18:35 +0100 |
commit | beece50670e86c36d0de987c581db5250604695c (patch) | |
tree | 3f9038ca7e10737984d9f201440f1f8df9cfb75c /src/target/aarch64.c | |
parent | 9d2e8aabb82ad440e14fd03d4007122c076eecb4 (diff) | |
download | riscv-openocd-beece50670e86c36d0de987c581db5250604695c.zip riscv-openocd-beece50670e86c36d0de987c581db5250604695c.tar.gz riscv-openocd-beece50670e86c36d0de987c581db5250604695c.tar.bz2 |
aarch64: don't segfault on reset when target is not examined
Basically port a fix that was already done for the cortex_a target.
Change-Id: I4cf4519159bda03ed611bc0b2e340a5dad2d85fe
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Diffstat (limited to 'src/target/aarch64.c')
-rw-r--r-- | src/target/aarch64.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/target/aarch64.c b/src/target/aarch64.c index 4871738..cabeb9c 100644 --- a/src/target/aarch64.c +++ b/src/target/aarch64.c @@ -1316,7 +1316,8 @@ static int aarch64_assert_reset(struct target *target) } /* registers are now invalid */ - register_cache_invalidate(armv8->arm.core_cache); + if (target_was_examined(target)) + register_cache_invalidate(armv8->arm.core_cache); target->state = TARGET_RESET; @@ -1332,6 +1333,9 @@ static int aarch64_deassert_reset(struct target *target) /* be certain SRST is off */ jtag_add_reset(0, 0); + if (!target_was_examined(target)) + return ERROR_OK; + retval = aarch64_poll(target); if (retval != ERROR_OK) return retval; |