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| author | Adrien Grassein <agrassein@nanoxplore.com> | 2024-01-18 11:58:38 +0100 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2025-03-29 18:25:49 +0000 |
| commit | 5773ff9d82a06e7e270dd71fc3d4352815384292 (patch) | |
| tree | 2ca819e6564673091d28e96abe00ce2d87499f9e /src/rtos/rtos_nuttx_stackings.c | |
| parent | 98e34fd1f17207ce30fd5c80ab9aefb28fbdc688 (diff) | |
| download | riscv-openocd-5773ff9d82a06e7e270dd71fc3d4352815384292.zip riscv-openocd-5773ff9d82a06e7e270dd71fc3d4352815384292.tar.gz riscv-openocd-5773ff9d82a06e7e270dd71fc3d4352815384292.tar.bz2 | |
target/armv8: Handle instruction cache invalidate
Some armv8 target have separate i-cache and d-cache.
The actual code only handles the flush of the d-cache.
Change-Id: I61a223b43c71646bbbed8fa63825360c67700988
Signed-off-by: Adrien Grassein <agrassein@nanoxplore.com>
Signed-off-by: Adrien Charruel <acharruel@nanoxplore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8655
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Diffstat (limited to 'src/rtos/rtos_nuttx_stackings.c')
0 files changed, 0 insertions, 0 deletions