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authormrv96 <mrv96@users.noreply.github.com>2022-09-30 11:25:55 +0200
committerTim Newsome <tim@sifive.com>2022-10-05 10:16:53 -0700
commitb70ccf297fcaa6aae6e12460f8cbf4a477b34197 (patch)
tree592df4927e6e87e0af89ec07514092aa046c8d11 /src/jtag/drivers/ftdi.c
parent6d4ba7cca82d302705587b7d43ed28ef49779067 (diff)
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OScan1 code cleanup
- change OSCAN1 to OScan1 - fix spacing
Diffstat (limited to 'src/jtag/drivers/ftdi.c')
-rw-r--r--src/jtag/drivers/ftdi.c236
1 files changed, 118 insertions, 118 deletions
diff --git a/src/jtag/drivers/ftdi.c b/src/jtag/drivers/ftdi.c
index 9eb1994..3cd67c7 100644
--- a/src/jtag/drivers/ftdi.c
+++ b/src/jtag/drivers/ftdi.c
@@ -107,16 +107,16 @@ static bool swd_mode;
#if BUILD_FTDI_OSCAN1 == 1
/*
- The cJTAG 2-wire OSCAN1 protocol, in lieu of 4-wire JTAG, is a configuration option
+ The cJTAG 2-wire OScan1 protocol, in lieu of 4-wire JTAG, is a configuration option
for some SoCs. An FTDI-based adapter that can be configured to appropriately drive
- the bidirectional pin TMSC is able to drive OSCAN1 protocol. For example, an Olimex
+ the bidirectional pin TMSC is able to drive OScan1 protocol. For example, an Olimex
ARM-USB-TINY-H with the ARM-JTAG-SWD adapter, connected to a cJTAG-enabled
target board is such a topology. A TCK cycle with TMS=1/TDI=N translates to a TMSC
output of N, and a TCK cycle with TMS=0 translates to a TMSC input from the target back
- to the adapter/probe. The OSCAN1 protocol uses 3 TCK cycles to generate the data flow
- that is equivalent to that of a single TCK cycle in 4-wire JTAG. The OSCAN1-related
+ to the adapter/probe. The OScan1 protocol uses 3 TCK cycles to generate the data flow
+ that is equivalent to that of a single TCK cycle in 4-wire JTAG. The OScan1-related
code in this module translates IR/DR scan commanads and JTAG state traversal commands
- to the two-wire clocking and signaling of OSCAN1 protocol, if placed into oscan1 mode
+ to the two-wire clocking and signaling of OScan1 protocol, if placed into OScan1 mode
during initialization.
*/
static void oscan1_reset_online_activate(void);
@@ -670,7 +670,7 @@ static void ftdi_execute_command(struct jtag_command *cmd)
switch (cmd->type) {
case JTAG_RESET:
#if BUILD_FTDI_OSCAN1 == 1
- oscan1_reset_online_activate(); /* put the target back into OSCAN1 mode */
+ oscan1_reset_online_activate(); /* put the target back into OScan1 mode */
#endif
break;
case JTAG_RUNTEST:
@@ -679,7 +679,7 @@ static void ftdi_execute_command(struct jtag_command *cmd)
case JTAG_TLR_RESET:
ftdi_execute_statemove(cmd);
#if BUILD_FTDI_OSCAN1 == 1
- oscan1_reset_online_activate(); /* put the target back into OSCAN1 mode */
+ oscan1_reset_online_activate(); /* put the target back into OScan1 mode */
#endif
break;
case JTAG_PATHMOVE:
@@ -763,7 +763,7 @@ static int ftdi_initialize(void)
} else if (oscan1_mode) {
struct signal *sig = find_signal_by_name("JTAG_SEL");
if (!sig) {
- LOG_ERROR("OSCAN1 mode is active but JTAG_SEL signal is not defined");
+ LOG_ERROR("OScan1 mode is active but JTAG_SEL signal is not defined");
return ERROR_JTAG_INIT_FAILED;
}
/* A dummy JTAG_SEL would have zero mask */
@@ -816,7 +816,7 @@ static void oscan1_mpsse_clock_data(struct mpsse_ctx *ctx, const uint8_t *out, u
int bitnum;
uint8_t bit;
- /* OSCAN1 uses 3 separate clocks */
+ /* OScan1 uses 3 separate clocks */
/* drive TMSC to the *negation* of the desired TDI value */
bitnum = out_offset + i;
@@ -862,7 +862,7 @@ static void oscan1_mpsse_clock_tms_cs(struct mpsse_ctx *ctx, const uint8_t *out,
uint8_t tmsbit;
uint8_t tdibit;
- /* OSCAN1 uses 3 separate clocks */
+ /* OScan1 uses 3 separate clocks */
/* drive TMSC to the *negation* of the desired TDI value */
tdibit = tdi ? 0 : 1;
@@ -921,114 +921,114 @@ static void oscan1_reset_online_activate(void)
uint16_t tdovalue;
static const struct {
- int8_t tck;
- int8_t tms;
- int8_t tdi;
+ int8_t tck;
+ int8_t tms;
+ int8_t tdi;
} sequence[] = {
- /* TCK=0, TMS=1, TDI=0 (drive TMSC to 0 baseline) */
- {'0', '1', '0'},
-
- /* Drive cJTAG escape sequence for TAP reset - 8 TMSC edges */
- /* TCK=1, TMS=1, TDI=0 (rising edge of TCK with TMSC still 0) */
- {'1', '1', '0'},
- /* TCK=1, TMS=1, TDI=1 (drive rising TMSC edge) */
- {'1', '1', '1'},
- /* TCK=1, TMS=1, TDI=0 (drive falling TMSC edge) */
- {'1', '1', '0'},
- /* TCK=1, TMS=1, TDI=1 (drive rising TMSC edge) */
- {'1', '1', '1'},
- /* TCK=1, TMS=1, TDI=0 (drive falling TMSC edge) */
- {'1', '1', '0'},
- /* TCK=1, TMS=1, TDI=1 (drive rising TMSC edge) */
- {'1', '1', '1'},
- /* TCK=1, TMS=1, TDI=0 (drive falling TMSC edge) */
- {'1', '1', '0'},
- /* TCK=1, TMS=1, TDI=1 (drive rising TMSC edge) */
- {'1', '1', '1'},
- /* TCK=1, TMS=1, TDI=0 (drive falling TMSC edge) */
- {'1', '1', '0'},
- /* TCK=0, TMS=1, TDI=0 (falling edge TCK with TMSC still 0) */
- {'0', '1', '0'},
-
- /* 3 TCK pulses for padding */
- /* TCK=1, TMS=1, TDI=0 (drive rising TCK edge) */
- {'1', '1', '0'},
- /* TCK=0, TMS=1, TDI=0 (drive falling TCK edge) */
- {'0', '1', '0'},
- /* TCK=1, TMS=1, TDI=0 (drive rising TCK edge) */
- {'1', '1', '0'},
- /* TCK=0, TMS=1, TDI=0 (drive falling TCK edge) */
- {'0', '1', '0'},
- /* TCK=1, TMS=1, TDI=0 (drive rising TCK edge) */
- {'1', '1', '0'},
- /* TCK=0, TMS=1, TDI=0 (drive falling TCK edge) */
- {'0', '1', '0'},
-
- /* Drive cJTAG escape sequence for SELECT */
- /* TCK=1, TMS=1, TDI=0 (rising edge of TCK with TMSC still 0, TAP reset that was just setup occurs here too) */
- {'1', '1', '0'},
- /* TCK=1, TMS=1, TDI=1 (drive rising TMSC edge) */
- {'1', '1', '1'},
- /* TCK=1, TMS=1, TDI=0 (drive falling TMSC edge) */
- {'1', '1', '0'},
- /* TCK=1, TMS=1, TDI=1 (drive rising TMSC edge) */
- {'1', '1', '1'},
- /* TCK=1, TMS=1, TDI=0 (drive falling TMSC edge) */
- {'1', '1', '0'},
- /* TCK=1, TMS=1, TDI=1 (drive rising TMSC edge) */
- {'1', '1', '1'},
- /* TCK=1, TMS=1, TDI=0 (drive falling TMSC edge) */
- {'1', '1', '0'},
- /* TCK=0, TMS=1, TDI=0 (falling edge TCK with TMSC still 0) */
- {'0', '1', '0'},
-
- /* Drive cJTAG escape sequence for activation */
- /* TCK=1, TMS=1, TDI=0 (rising edge TCK with TMSC still 0... online mode activated... also OAC bit0==0) */
- {'1', '1', '0'},
- /* TCK=0, TMS=1, TDI=0 (falling edge TCK) */
- {'0', '1', '0'},
- /* TCK=1, TMS=1, TDI=0 (rising edge TCK... OAC bit1==0) */
- {'1', '1', '0'},
- /* TCK=0, TMS=1, TDI=1 (falling edge TCK) */
- {'0', '1', '1'},
- /* TCK=1, TMS=1, TDI=1 (rising edge TCK... OAC bit2==1) */
- {'1', '1', '1'},
- /* TCK=0, TMS=1, TDI=1 (falling edge TCK, TMSC stays high) */
- {'0', '1', '1'},
- /* TCK=1, TMS=1, TDI=1 (rising edge TCK... OAC bit3==1) */
- {'1', '1', '1'},
- /* TCK=0, TMS=1, TDI=0 (falling edge TCK) */
- {'0', '1', '0'},
- /* TCK=1, TMS=1, TDI=0 (rising edge TCK... EC bit0==0) */
- {'1', '1', '0'},
- /* TCK=0, TMS=1, TDI=0 (falling edge TCK) */
- {'0', '1', '0'},
- /* TCK=1, TMS=1, TDI=0 (rising edge TCK... EC bit1==0) */
- {'1', '1', '0'},
- /* TCK=0, TMS=1, TDI=0 (falling edge TCK) */
- {'0', '1', '0'},
- /* TCK=1, TMS=1, TDI=0 (rising edge TCK... EC bit2==0) */
- {'1', '1', '0'},
- /* TCK=0, TMS=1, TDI=1 (falling edge TCK) */
- {'0', '1', '1'},
- /* TCK=1, TMS=1, TDI=1 (rising edge TCK... EC bit3==1) */
- {'1', '1', '1'},
- /* TCK=0, TMS=1, TDI=0 (falling edge TCK) */
- {'0', '1', '0'},
- /* TCK=1, TMS=1, TDI=0 (rising edge TCK... CP bit0==0) */
- {'1', '1', '0'},
- /* TCK=0, TMS=1, TDI=0 (falling edge TCK) */
- {'0', '1', '0'},
- /* TCK=1, TMS=1, TDI=0 (rising edge TCK... CP bit1==0) */
- {'1', '1', '0'},
- /* TCK=0, TMS=1, TDI=0 (falling edge TCK) */
- {'0', '1', '0'},
- /* TCK=1, TMS=1, TDI=0 (rising edge TCK... CP bit2==0) */
- {'1', '1', '0'},
- /* TCK=0, TMS=1, TDI=0 (falling edge TCK) */
- {'0', '1', '0'},
- /* TCK=1, TMS=1, TDI=0 (rising edge TCK... CP bit3==0) */
- {'1', '1', '0'},
+ /* TCK=0, TMS=1, TDI=0 (drive TMSC to 0 baseline) */
+ {'0', '1', '0'},
+
+ /* Drive cJTAG escape sequence for TAP reset - 8 TMSC edges */
+ /* TCK=1, TMS=1, TDI=0 (rising edge of TCK with TMSC still 0) */
+ {'1', '1', '0'},
+ /* TCK=1, TMS=1, TDI=1 (drive rising TMSC edge) */
+ {'1', '1', '1'},
+ /* TCK=1, TMS=1, TDI=0 (drive falling TMSC edge) */
+ {'1', '1', '0'},
+ /* TCK=1, TMS=1, TDI=1 (drive rising TMSC edge) */
+ {'1', '1', '1'},
+ /* TCK=1, TMS=1, TDI=0 (drive falling TMSC edge) */
+ {'1', '1', '0'},
+ /* TCK=1, TMS=1, TDI=1 (drive rising TMSC edge) */
+ {'1', '1', '1'},
+ /* TCK=1, TMS=1, TDI=0 (drive falling TMSC edge) */
+ {'1', '1', '0'},
+ /* TCK=1, TMS=1, TDI=1 (drive rising TMSC edge) */
+ {'1', '1', '1'},
+ /* TCK=1, TMS=1, TDI=0 (drive falling TMSC edge) */
+ {'1', '1', '0'},
+ /* TCK=0, TMS=1, TDI=0 (falling edge TCK with TMSC still 0) */
+ {'0', '1', '0'},
+
+ /* 3 TCK pulses for padding */
+ /* TCK=1, TMS=1, TDI=0 (drive rising TCK edge) */
+ {'1', '1', '0'},
+ /* TCK=0, TMS=1, TDI=0 (drive falling TCK edge) */
+ {'0', '1', '0'},
+ /* TCK=1, TMS=1, TDI=0 (drive rising TCK edge) */
+ {'1', '1', '0'},
+ /* TCK=0, TMS=1, TDI=0 (drive falling TCK edge) */
+ {'0', '1', '0'},
+ /* TCK=1, TMS=1, TDI=0 (drive rising TCK edge) */
+ {'1', '1', '0'},
+ /* TCK=0, TMS=1, TDI=0 (drive falling TCK edge) */
+ {'0', '1', '0'},
+
+ /* Drive cJTAG escape sequence for SELECT */
+ /* TCK=1, TMS=1, TDI=0 (rising edge of TCK with TMSC still 0, TAP reset that was just setup occurs here too) */
+ {'1', '1', '0'},
+ /* TCK=1, TMS=1, TDI=1 (drive rising TMSC edge) */
+ {'1', '1', '1'},
+ /* TCK=1, TMS=1, TDI=0 (drive falling TMSC edge) */
+ {'1', '1', '0'},
+ /* TCK=1, TMS=1, TDI=1 (drive rising TMSC edge) */
+ {'1', '1', '1'},
+ /* TCK=1, TMS=1, TDI=0 (drive falling TMSC edge) */
+ {'1', '1', '0'},
+ /* TCK=1, TMS=1, TDI=1 (drive rising TMSC edge) */
+ {'1', '1', '1'},
+ /* TCK=1, TMS=1, TDI=0 (drive falling TMSC edge) */
+ {'1', '1', '0'},
+ /* TCK=0, TMS=1, TDI=0 (falling edge TCK with TMSC still 0) */
+ {'0', '1', '0'},
+
+ /* Drive cJTAG escape sequence for activation */
+ /* TCK=1, TMS=1, TDI=0 (rising edge TCK with TMSC still 0... online mode activated... also OAC bit0==0) */
+ {'1', '1', '0'},
+ /* TCK=0, TMS=1, TDI=0 (falling edge TCK) */
+ {'0', '1', '0'},
+ /* TCK=1, TMS=1, TDI=0 (rising edge TCK... OAC bit1==0) */
+ {'1', '1', '0'},
+ /* TCK=0, TMS=1, TDI=1 (falling edge TCK) */
+ {'0', '1', '1'},
+ /* TCK=1, TMS=1, TDI=1 (rising edge TCK... OAC bit2==1) */
+ {'1', '1', '1'},
+ /* TCK=0, TMS=1, TDI=1 (falling edge TCK, TMSC stays high) */
+ {'0', '1', '1'},
+ /* TCK=1, TMS=1, TDI=1 (rising edge TCK... OAC bit3==1) */
+ {'1', '1', '1'},
+ /* TCK=0, TMS=1, TDI=0 (falling edge TCK) */
+ {'0', '1', '0'},
+ /* TCK=1, TMS=1, TDI=0 (rising edge TCK... EC bit0==0) */
+ {'1', '1', '0'},
+ /* TCK=0, TMS=1, TDI=0 (falling edge TCK) */
+ {'0', '1', '0'},
+ /* TCK=1, TMS=1, TDI=0 (rising edge TCK... EC bit1==0) */
+ {'1', '1', '0'},
+ /* TCK=0, TMS=1, TDI=0 (falling edge TCK) */
+ {'0', '1', '0'},
+ /* TCK=1, TMS=1, TDI=0 (rising edge TCK... EC bit2==0) */
+ {'1', '1', '0'},
+ /* TCK=0, TMS=1, TDI=1 (falling edge TCK) */
+ {'0', '1', '1'},
+ /* TCK=1, TMS=1, TDI=1 (rising edge TCK... EC bit3==1) */
+ {'1', '1', '1'},
+ /* TCK=0, TMS=1, TDI=0 (falling edge TCK) */
+ {'0', '1', '0'},
+ /* TCK=1, TMS=1, TDI=0 (rising edge TCK... CP bit0==0) */
+ {'1', '1', '0'},
+ /* TCK=0, TMS=1, TDI=0 (falling edge TCK) */
+ {'0', '1', '0'},
+ /* TCK=1, TMS=1, TDI=0 (rising edge TCK... CP bit1==0) */
+ {'1', '1', '0'},
+ /* TCK=0, TMS=1, TDI=0 (falling edge TCK) */
+ {'0', '1', '0'},
+ /* TCK=1, TMS=1, TDI=0 (rising edge TCK... CP bit2==0) */
+ {'1', '1', '0'},
+ /* TCK=0, TMS=1, TDI=0 (falling edge TCK) */
+ {'0', '1', '0'},
+ /* TCK=1, TMS=1, TDI=0 (rising edge TCK... CP bit3==0) */
+ {'1', '1', '0'},
};
@@ -1356,7 +1356,7 @@ static const struct command_registration ftdi_subcommand_handlers[] = {
.name = "oscan1_mode",
.handler = &ftdi_handle_oscan1_mode_command,
.mode = COMMAND_ANY,
- .help = "set to 'on' to use OSCAN1 mode for signaling, otherwise 'off' (default is 'off')",
+ .help = "set to 'on' to use OScan1 mode for signaling, otherwise 'off' (default is 'off')",
.usage = "(on|off)",
},
#endif