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| author | ntfreak <ntfreak@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-04-10 11:43:48 +0000 |
|---|---|---|
| committer | ntfreak <ntfreak@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-04-10 11:43:48 +0000 |
| commit | 9c3dec377eb6eb822b85fa107ade2a62c9e1cfd1 (patch) | |
| tree | 528bc639688200b05ae27df46046c3544399d121 /src/helper | |
| parent | 1ade331ba925c506ed4254f31dba5e6f9cf782b4 (diff) | |
| download | riscv-openocd-9c3dec377eb6eb822b85fa107ade2a62c9e1cfd1.zip riscv-openocd-9c3dec377eb6eb822b85fa107ade2a62c9e1cfd1.tar.gz riscv-openocd-9c3dec377eb6eb822b85fa107ade2a62c9e1cfd1.tar.bz2 | |
- single core context used, removed debug context as thought unnecessary.
- DCRDR now used to access special core registers - info is currently omitted from the cortex_m3 TRM ARM have told me this is the preferred access method and the docs will be updated soon.
- now checks for User Thread Mode and Thread mode when halted.
- removed repeated function declarations from command.c
- cortex_m3_prepare_reset_halt removed, updated cortex_m3_assert_reset to suit
git-svn-id: svn://svn.berlios.de/openocd/trunk@558 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/helper')
| -rw-r--r-- | src/helper/binarybuffer.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/helper/binarybuffer.c b/src/helper/binarybuffer.c index 03e2b7e..6aa847a 100644 --- a/src/helper/binarybuffer.c +++ b/src/helper/binarybuffer.c @@ -29,10 +29,6 @@ #include "binarybuffer.h" -int buf_set_u32(u8* buffer, unsigned int first, unsigned int num, u32 value); -u32 buf_get_u32(u8* buffer, unsigned int first, unsigned int num); -u32 flip_u32(u32 value, unsigned int num); - const unsigned char bit_reverse_table256[] = { 0x00, 0x80, 0x40, 0xC0, 0x20, 0xA0, 0x60, 0xE0, 0x10, 0x90, 0x50, 0xD0, 0x30, 0xB0, 0x70, 0xF0, |