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| author | Andreas Bolsch <hyphen0break@gmail.com> | 2022-11-12 16:29:18 +0100 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2022-11-15 21:34:40 +0000 |
| commit | 2bad55bf83bcd4a24711a88b06971f3f828947bd (patch) | |
| tree | bd68bad166659915219b7f5c276cc37fef60fd28 /src/flash | |
| parent | 1762aa04ce9a7883e85631c371d6e1f94d16e31a (diff) | |
| download | riscv-openocd-2bad55bf83bcd4a24711a88b06971f3f828947bd.zip riscv-openocd-2bad55bf83bcd4a24711a88b06971f3f828947bd.tar.gz riscv-openocd-2bad55bf83bcd4a24711a88b06971f3f828947bd.tar.bz2 | |
Fix for segfault and some clang reported problems in stmqspi
Change-Id: Id003adb574085cdd603cc13aeb6f2efec73593f1
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7345
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Diffstat (limited to 'src/flash')
| -rw-r--r-- | src/flash/nor/stmqspi.c | 30 |
1 files changed, 14 insertions, 16 deletions
diff --git a/src/flash/nor/stmqspi.c b/src/flash/nor/stmqspi.c index e5df3b9..77ea4c4 100644 --- a/src/flash/nor/stmqspi.c +++ b/src/flash/nor/stmqspi.c @@ -616,8 +616,6 @@ COMMAND_HANDLER(stmqspi_handle_set) LOG_DEBUG("%s", __func__); - dual = (stmqspi_info->saved_cr & BIT(SPI_DUAL_FLASH)) ? 1 : 0; - /* chip_erase_cmd, sectorsize and erase_cmd are optional */ if ((CMD_ARGC < 7) || (CMD_ARGC > 10)) return ERROR_COMMAND_SYNTAX_ERROR; @@ -628,8 +626,9 @@ COMMAND_HANDLER(stmqspi_handle_set) target = bank->target; stmqspi_info = bank->driver_priv; + dual = (stmqspi_info->saved_cr & BIT(SPI_DUAL_FLASH)) ? 1 : 0; - /* invalidate all old info */ + /* invalidate all flash device info */ if (stmqspi_info->probed) free(bank->sectors); bank->size = 0; @@ -721,10 +720,8 @@ COMMAND_HANDLER(stmqspi_handle_set) uint32_t dcr; retval = target_read_u32(target, io_base + SPI_DCR, &dcr); - if (retval != ERROR_OK) return retval; - fsize = (dcr >> SPI_FSIZE_POS) & (BIT(SPI_FSIZE_LEN) - 1); LOG_DEBUG("FSIZE = 0x%04x", fsize); @@ -2080,16 +2077,17 @@ static int stmqspi_probe(struct flash_bank *bank) bool octal_dtr; int retval; - if (stmqspi_info->probed) { - bank->size = 0; - bank->num_sectors = 0; + /* invalidate all flash device info */ + if (stmqspi_info->probed) free(bank->sectors); - bank->sectors = NULL; - memset(&stmqspi_info->dev, 0, sizeof(stmqspi_info->dev)); - stmqspi_info->sfdp_dummy1 = 0; - stmqspi_info->sfdp_dummy2 = 0; - stmqspi_info->probed = false; - } + bank->size = 0; + bank->num_sectors = 0; + bank->sectors = NULL; + stmqspi_info->sfdp_dummy1 = 0; + stmqspi_info->sfdp_dummy2 = 0; + stmqspi_info->probed = false; + memset(&stmqspi_info->dev, 0, sizeof(stmqspi_info->dev)); + stmqspi_info->dev.name = "unknown"; /* Abort any previous operation */ retval = stmqspi_abort(bank); @@ -2104,8 +2102,8 @@ static int stmqspi_probe(struct flash_bank *bank) /* check whether QSPI_ABR is writeable and readback returns the value written */ retval = target_write_u32(target, io_base + QSPI_ABR, magic); if (retval == ERROR_OK) { - retval = target_read_u32(target, io_base + QSPI_ABR, &data); - retval = target_write_u32(target, io_base + QSPI_ABR, 0); + (void)target_read_u32(target, io_base + QSPI_ABR, &data); + (void)target_write_u32(target, io_base + QSPI_ABR, 0); } if (data == magic) { |