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| author | Tim Newsome <tim@sifive.com> | 2019-02-14 17:33:28 -0800 |
|---|---|---|
| committer | Matthias Welwarsky <matthias@welwarsky.de> | 2019-03-08 14:05:35 +0000 |
| commit | c3b90c052acfb7e35a0f4ce22276d53a96d631c7 (patch) | |
| tree | 38d260910f37f2213c6c1e3159dcef342ba25923 /src/flash/nor/tms470.c | |
| parent | 57e30102ea440d77aa001e26eb901d0cbb305a30 (diff) | |
| download | riscv-openocd-c3b90c052acfb7e35a0f4ce22276d53a96d631c7.zip riscv-openocd-c3b90c052acfb7e35a0f4ce22276d53a96d631c7.tar.gz riscv-openocd-c3b90c052acfb7e35a0f4ce22276d53a96d631c7.tar.bz2 | |
flash/nor: use target_addr_t for flash bank base
This should allow users to configure flash at >32-bit addresses.
Change-Id: I7c9d3c5762579011a2d9708e5317e5765349845c
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4919
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Diffstat (limited to 'src/flash/nor/tms470.c')
| -rw-r--r-- | src/flash/nor/tms470.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/src/flash/nor/tms470.c b/src/flash/nor/tms470.c index 2435e79..62fe2f5 100644 --- a/src/flash/nor/tms470.c +++ b/src/flash/nor/tms470.c @@ -165,7 +165,8 @@ static int tms470_read_part_info(struct flash_bank *bank) part_name = "TMS470R1A256"; if (bank->base >= 0x00040000) { - LOG_ERROR("No %s flash bank contains base address 0x%08" PRIx32 ".", + LOG_ERROR("No %s flash bank contains base address " + TARGET_ADDR_FMT ".", part_name, bank->base); return ERROR_FLASH_OPERATION_FAILED; @@ -204,7 +205,7 @@ static int tms470_read_part_info(struct flash_bank *bank) (void)memcpy(bank->sectors, TMS470R1A288_BANK1_SECTORS, sizeof(TMS470R1A288_BANK1_SECTORS)); } else { - LOG_ERROR("No %s flash bank contains base address 0x%08" PRIx32 ".", + LOG_ERROR("No %s flash bank contains base address " TARGET_ADDR_FMT ".", part_name, bank->base); return ERROR_FLASH_OPERATION_FAILED; } @@ -244,7 +245,7 @@ static int tms470_read_part_info(struct flash_bank *bank) (void)memcpy(bank->sectors, TMS470R1A384_BANK2_SECTORS, sizeof(TMS470R1A384_BANK2_SECTORS)); } else { - LOG_ERROR("No %s flash bank contains base address 0x%08" PRIx32 ".", + LOG_ERROR("No %s flash bank contains base address " TARGET_ADDR_FMT ".", part_name, bank->base); return ERROR_FLASH_OPERATION_FAILED; } @@ -900,8 +901,8 @@ static int tms470_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t tms470_read_part_info(bank); - LOG_INFO("Writing %" PRId32 " bytes starting at 0x%08" PRIx32 "", count, bank->base + - offset); + LOG_INFO("Writing %" PRId32 " bytes starting at " TARGET_ADDR_FMT, + count, bank->base + offset); /* set GLBCTRL.4 */ target_read_u32(target, 0xFFFFFFDC, &glbctrl); |