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author | oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-09-03 08:23:39 +0000 |
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committer | oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-09-03 08:23:39 +0000 |
commit | a89dd2ca6542d157890656d918d6ae2f933ab401 (patch) | |
tree | 042f98ba0659b4602aaccf69571208e10cb1ff30 /src/flash/nand.h | |
parent | 3878b1279399cbd1c57730f7410db4b7c01b15c4 (diff) | |
download | riscv-openocd-a89dd2ca6542d157890656d918d6ae2f933ab401.zip riscv-openocd-a89dd2ca6542d157890656d918d6ae2f933ab401.tar.gz riscv-openocd-a89dd2ca6542d157890656d918d6ae2f933ab401.tar.bz2 |
David Brownell
Abstract the orion_nand_fast_block_write() routine into a separate
routine -- arm_nandwrite() -- so that other ARM cores can reuse it.
Have davinci_nand do so. This faster than byte-at-a-time ops by a
factor of three (!), even given the slowish interactions to support
hardware ECC (1-bit flavor in that test) each 512 bytes; those could
be read more efficiently by on-chip code.
NOTE that until there's a generic "ARM algorithm" structure, this
can't work on newer ARMv6 (like ARM1136) or ARMv7A (like Cortex-A8)
cores, though the downloaded code itself would work just fine there.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2663 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/flash/nand.h')
-rw-r--r-- | src/flash/nand.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/flash/nand.h b/src/flash/nand.h index ab87123..b73e330 100644 --- a/src/flash/nand.h +++ b/src/flash/nand.h @@ -223,5 +223,6 @@ extern int nand_init(struct command_context_s *cmd_ctx); #define ERROR_NAND_OPERATION_NOT_SUPPORTED (-1103) #define ERROR_NAND_DEVICE_NOT_PROBED (-1104) #define ERROR_NAND_ERROR_CORRECTION_FAILED (-1105) +#define ERROR_NAND_NO_BUFFER (-1106) #endif /* NAND_H */ |