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author | Spencer Oliver <spen@spen-soft.co.uk> | 2012-03-08 12:33:25 +0000 |
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committer | Spencer Oliver <spen@spen-soft.co.uk> | 2012-03-13 17:02:22 +0000 |
commit | ea39d4b281090fc421a90125cc0c96405cacef0c (patch) | |
tree | b030cfba707c75ca2cc85bb885f67a322fb2b104 /doc | |
parent | 7d1f9bafc75b6230afa5b6a74d8e106926e04747 (diff) | |
download | riscv-openocd-ea39d4b281090fc421a90125cc0c96405cacef0c.zip riscv-openocd-ea39d4b281090fc421a90125cc0c96405cacef0c.tar.gz riscv-openocd-ea39d4b281090fc421a90125cc0c96405cacef0c.tar.bz2 |
docs: add stm32 dual bank example
Change-Id: I1dfe134e2c7694fc978d14b4b21bdf9c82ca4b16
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/507
Tested-by: jenkins
Diffstat (limited to 'doc')
-rw-r--r-- | doc/openocd.texi | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi index 0f24f85..71605ec 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -4905,6 +4905,12 @@ the chip identification register, and autoconfigures itself. flash bank $_FLASHNAME stm32f1x 0 0 0 0 $_TARGETNAME @end example +If you have a target with dual flash banks then define the second bank +as per the following example. +@example +flash bank $_FLASHNAME stm32f1x 0x08080000 0 0 0 $_TARGETNAME +@end example + Some stm32f1x-specific commands @footnote{Currently there is a @command{stm32f1x mass_erase} command. That seems pointless since the same effect can be had using the |