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| author | Erhan Kurubas <43336369+erhankur@users.noreply.github.com> | 2022-06-06 17:39:05 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-06-06 08:39:05 -0700 |
| commit | 40458f6b251c943b76792d6a2bf8c7633636a935 (patch) | |
| tree | dfabb1b3d635513d1ba74788badf832036aa3122 /doc | |
| parent | 9906763b89c405a5ad9dd5a7aca45fdcca9061ee (diff) | |
| download | riscv-openocd-40458f6b251c943b76792d6a2bf8c7633636a935.zip riscv-openocd-40458f6b251c943b76792d6a2bf8c7633636a935.tar.gz riscv-openocd-40458f6b251c943b76792d6a2bf8c7633636a935.tar.bz2 | |
tcl: add Espressif riscv targets (ESP32-C2 & ESP32-C3) (#706)
Change-Id: I48fead33f5fd5890a7724cd5f500f2d14e2a5ffa
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/openocd.texi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi index ac7ad88..850b914 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -4714,6 +4714,8 @@ compact Thumb2 instruction set. Supports also ARMv6-M and ARMv8-M cores @item @code{dsp5680xx} -- implements Freescale's 5680x DSP. @item @code{esirisc} -- this is an EnSilica eSi-RISC core. The current implementation supports eSi-32xx cores. +@item @code{esp32c2} -- this is an Espressif SoC with single RISC-V core. +@item @code{esp32c3} -- this is an Espressif SoC with single RISC-V core. @item @code{fa526} -- resembles arm920 (w/o Thumb). @item @code{feroceon} -- resembles arm926. @item @code{hla_target} -- a Cortex-M alternative to work with HL adapters like ST-Link. |