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authorPaul Fertser <fercerpav@gmail.com>2014-03-22 16:47:37 +0400
committerPaul Fertser <fercerpav@gmail.com>2014-03-29 08:40:03 +0000
commit207237b92005d604b75ff5280042a6c286a685f8 (patch)
treedbe5dbb408ac7470a8b6f1c06f57defef8d79a5a /doc
parentde9ebc5ce6432830d473aba769c34ae38794c947 (diff)
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tcl: introduce init_target_events and use it for gdb flashing events
This introduces a new global Tcl procedure that is run just after init_targets and before init_boards. Its default behaviour is to assign gdb-flash-erase-start and gdb-flash-write-end to reasonable defaults. The rationale for doing "reset init" before gdb erases and flashes memory is that all flash drivers are written in assumption that they can safely be used only after chip reset (plus chip-specific configuration in the init handler if any). The need to use "reset halt" after flashing is because a user expects running firmware after loading to be the same as running it from power-on-reset. Change-Id: I9ddc4047611904ca4ca779b73376d2739611948a Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2062 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'doc')
-rw-r--r--doc/openocd.texi16
1 files changed, 14 insertions, 2 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 455e6fb..3977454 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2109,6 +2109,17 @@ For an example of this scheme see LPC2000 target config files.
The @code{init_boards} procedure is a similar concept concerning board config files
(@xref{theinitboardprocedure,,The init_board procedure}.)
+@anchor{theinittargeteventsprocedure}
+@subsection The init_target_events procedure
+@cindex init_target_events procedure
+
+A special procedure called @code{init_target_events} is run just after
+@code{init_targets} (@xref{theinittargetsprocedure,,The init_targets
+procedure}.) and before @code{init_board}
+(@xref{theinitboardprocedure,,The init_board procedure}.) It is used
+to set up default target events for the targets that do not have those
+events already assigned.
+
@subsection ARM Core Specific Hacks
If the chip has a DCC, enable it. If the chip is an ARM9 with some
@@ -4577,13 +4588,14 @@ depending on whether the breakpoint is in RAM or read only memory.
@item @b{gdb-end}
@* When the target has halted and GDB is not doing anything (see early halt)
@item @b{gdb-flash-erase-start}
-@* Before the GDB flash process tries to erase the flash
+@* Before the GDB flash process tries to erase the flash (default is
+@code{reset init})
@item @b{gdb-flash-erase-end}
@* After the GDB flash process has finished erasing the flash
@item @b{gdb-flash-write-start}
@* Before GDB writes to the flash
@item @b{gdb-flash-write-end}
-@* After GDB writes to the flash
+@* After GDB writes to the flash (default is @code{reset halt})
@item @b{gdb-start}
@* Before the target steps, gdb is trying to start/resume the target
@item @b{halted}