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| author | Parshintsev Anatoly <anatoly.parshintsev@syntacore.com> | 2023-06-22 19:28:52 +0300 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2024-06-08 08:45:44 +0000 |
| commit | d382c95d57c0ad9ed2dcc83c95404babb7647708 (patch) | |
| tree | 797148eeb5bf4738e61b27524e3349ee0719e757 /doc/openocd.texi | |
| parent | 2f8bb252ffb89cb2019f634230bc17b4dfccc75a (diff) | |
| download | riscv-openocd-d382c95d57c0ad9ed2dcc83c95404babb7647708.zip riscv-openocd-d382c95d57c0ad9ed2dcc83c95404babb7647708.tar.gz riscv-openocd-d382c95d57c0ad9ed2dcc83c95404babb7647708.tar.bz2 | |
target/riscv: support for smp group manipulation
this functionality allows to query if a target belongs to some smp group
and to dynamically turn on/off smp-specific behavior
Change-Id: I67bafb1817c621a38ae4a2f55e12e4143e992c4e
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
Signed-off-by: Bernhard Rosenkränzer <bero@baylibre.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8296
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Diffstat (limited to 'doc/openocd.texi')
| -rw-r--r-- | doc/openocd.texi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi index 87e3650..b782e0b 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -11278,6 +11278,18 @@ When utilizing version 0.11 of the RISC-V Debug Specification, and DBUS registers, respectively. @end deffn +@deffn {Command} {riscv smp} [on|off] +Display, enable or disable SMP handling mode. This command is needed only if +user wants to temporary @b{disable} SMP handling for an existing SMP group +(see @code{aarch64 smp} for additional information). To define an SMP +group the command @code{target smp} should be used. +@end deffn + +@deffn {Command} {riscv smp_gdb} [core_id] +Display/set the current core displayed in GDB. This is needed only if +@code{riscv smp} was used. +@end deffn + @deffn {Command} {riscv use_bscan_tunnel} value Enable or disable use of a BSCAN tunnel to reach the Debug Module. Supply the width of the DM transport TAP's instruction register to enable. Supply a |