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| author | Evgeniy Naydanov <evgeniy.naydanov@syntacore.com> | 2024-05-30 19:46:03 +0300 |
|---|---|---|
| committer | Evgeniy Naydanov <evgeniy.naydanov@syntacore.com> | 2024-05-30 19:46:03 +0300 |
| commit | 9c4a5d64ca8e4310fd81de22bbf141c2a1d62b36 (patch) | |
| tree | a2d684d591b860976dd01226d7841eeb16030d80 /doc/openocd.texi | |
| parent | 347981ca5533b540f187ae3d09495a8e344c4de1 (diff) | |
| parent | 437dde701c13e707e5fd912ef6403e09052e4d9b (diff) | |
| download | riscv-openocd-9c4a5d64ca8e4310fd81de22bbf141c2a1d62b36.zip riscv-openocd-9c4a5d64ca8e4310fd81de22bbf141c2a1d62b36.tar.gz riscv-openocd-9c4a5d64ca8e4310fd81de22bbf141c2a1d62b36.tar.bz2 | |
Merge up to 437dde701c13e707e5fd912ef6403e09052e4d9b from upstream
Conflict in src/rtos/FreeRTOS.c due to
fbea7d5d38d0dcbdd71cb574da9bd12c78b568cf -- resolved by replacing
`target->type->name` with a call to `target_type_name()`.
Change-Id: I56702c6133894458903de7a4d764903004aa8b86
Diffstat (limited to 'doc/openocd.texi')
| -rw-r--r-- | doc/openocd.texi | 19 |
1 files changed, 15 insertions, 4 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi index 47879cc..8ffbcf3 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -399,8 +399,7 @@ to be available anymore as of April 2012. @* Link @url{http://www.distortec.com/jtag-lock-pick-tiny-2} FT232H-based @item @b{GW16042} -@* Link: @url{http://shop.gateworks.com/index.php?route=product/product&path=70_80&product_id=64} -FT2232H-based +@* Link: @url{https://www.gateworks.com/} FT2232H-based @end itemize @section USB-JTAG / Altera USB-Blaster compatibles @@ -442,7 +441,7 @@ SWD and not JTAG, thus not supported. @itemize @bullet @item @b{Raisonance RLink} -@* Link: @url{http://www.mcu-raisonance.com/~rlink-debugger-programmer__@/microcontrollers__tool~tool__T018:4cn9ziz4bnx6.html} +@* Link: @url{https://www.raisonance.com/rlink.html} @item @b{STM32 Primer} @* Link: @url{http://www.stm32circle.com/resources/stm32primer.php} @item @b{STM32 Primer2} @@ -9220,6 +9219,18 @@ read_memory 0x20000000 32 2 @end example @end deffn +@deffn {Command} {debug_reason} +Displays the current debug reason: +@code{debug-request}, +@code{breakpoint}, +@code{watchpoint}, +@code{watchpoint-and-breakpoint}, +@code{single-step}, +@code{target-not-halted}, +@code{program-exit}, +@code{exception-catch} or @code{undefined}. +@end deffn + @deffn {Command} {halt} [ms] @deffnx {Command} {wait_halt} [ms] The @command{halt} command first sends a halt request to the target, @@ -9389,7 +9400,7 @@ Loads an image stored in memory by @command{fast_load_image} to the current target. Must be preceded by fast_load_image. @end deffn -@deffn {Command} {fast_load_image} filename [address [@option{bin}|@option{ihex}|@option{elf}|@option{s19} [@option{min_addr} [@option{max_length}]]]]]] +@deffn {Command} {fast_load_image} filename [address [@option{bin}|@option{ihex}|@option{elf}|@option{s19} [@option{min_addr} [@option{max_length}]]]] Normally you should be using @command{load_image} or GDB load. However, for testing purposes or when I/O overhead is significant(OpenOCD running on an embedded host), storing the image in memory and uploading the image to the target |