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| author | Antonio Borneo <borneo.antonio@gmail.com> | 2024-05-14 14:23:07 +0200 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2024-06-23 09:29:37 +0000 |
| commit | b5dfef7577f87c34bd397981c17e5d461d1c217f (patch) | |
| tree | 0eec7b66c065f0fc63ece26d35a308e3ef3d1e43 /NEWTAPS | |
| parent | f39f136e012589212b463af4ef1ac7d855901810 (diff) | |
| download | riscv-openocd-b5dfef7577f87c34bd397981c17e5d461d1c217f.zip riscv-openocd-b5dfef7577f87c34bd397981c17e5d461d1c217f.tar.gz riscv-openocd-b5dfef7577f87c34bd397981c17e5d461d1c217f.tar.bz2 | |
target: aarch64: access reg ESR_EL1 only in EL1, EL2 and EL3
The register ESR_EL1 is accessible and it's content is relevant
only when the target is in EL1 or EL2 or EL3.
Plus, the register is 64 bits wide.
Without this patch, an error:
Error: Opcode 0xd5385200, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
x/p $ESR_EL1
or through OpenOCD command
reg ESR_EL1
Detect the EL and return error if the register cannot be accessed.
Handle the register as 64 bits.
Change-Id: Icd65470c279e5cfd03091db6435cdaa1c447644c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8275
Tested-by: jenkins
Diffstat (limited to 'NEWTAPS')
0 files changed, 0 insertions, 0 deletions