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author | Niklas Söderlund <niklas.soderlund@ragnatech.se> | 2018-04-07 21:39:45 +0200 |
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committer | Matthias Welwarsky <matthias@welwarsky.de> | 2018-04-09 20:18:29 +0100 |
commit | f00d9bb1d7e6d52e62e7cfc402fda96f3544d911 (patch) | |
tree | 119499504c23dd6482e1a83e618e23f59aa353a4 | |
parent | 6e356cbfe27c1718d784f7aa36efb483a523fb64 (diff) | |
download | riscv-openocd-f00d9bb1d7e6d52e62e7cfc402fda96f3544d911.zip riscv-openocd-f00d9bb1d7e6d52e62e7cfc402fda96f3544d911.tar.gz riscv-openocd-f00d9bb1d7e6d52e62e7cfc402fda96f3544d911.tar.bz2 |
tcl/target: Add Renesas R-Car R8A7791 M2W target
Add configuration for the Renesas R-Car R8A7791 M2W target.
This is an SoC with two Cortex A15 ARMv7a cores, both cores
are supported.
This patch is based on initial submission by Adam Bass and
improvements by Niklas Söderlund.
Change-Id: I297da62b9ce71ad222a401d98e6bcb8502427673
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Adam Bass <adam.bass@renesas.com>
Cc: Niklas Söderlund <niklas.soderlund@ragnatech.se>
Reviewed-on: http://openocd.zylin.com/4485
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
-rw-r--r-- | tcl/target/renesas_r8a7791.cfg | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/tcl/target/renesas_r8a7791.cfg b/tcl/target/renesas_r8a7791.cfg new file mode 100644 index 0000000..f93cbb8 --- /dev/null +++ b/tcl/target/renesas_r8a7791.cfg @@ -0,0 +1,27 @@ +# Renesas R-Car M2 +# https://www.renesas.com/en-us/solutions/automotive/products/rcar-m2.html + +if { [info exists DAP_TAPID] } { + set _DAP_TAPID $DAP_TAPID +} else { + set _DAP_TAPID 0x4ba00477 +} + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME r8a7791 +} + +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f -expected-id $_DAP_TAPID + +# Configuring only one core using DAP. +# Base addresses of cores: +# core 0 - 0x800B0000 +# core 1 - 0x800B2000 +set _TARGETNAME $_CHIPNAME.ca15. +dap create ${_CHIPNAME}.dap -chain-position $_CHIPNAME.cpu +target create ${_TARGETNAME}0 cortex_a -dap ${_CHIPNAME}.dap -coreid 0 -dbgbase 0x800B0000 +target create ${_TARGETNAME}1 cortex_a -dap ${_CHIPNAME}.dap -coreid 1 -dbgbase 0x800B2000 -defer-examine + +targets ${_TARGETNAME}0 |