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| author | David Brownell <dbrownell@users.sourceforge.net> | 2010-01-12 12:40:39 -0800 |
|---|---|---|
| committer | David Brownell <dbrownell@users.sourceforge.net> | 2010-01-12 12:40:39 -0800 |
| commit | b4a4d5c7310c88ef263bfaaa060b5c249d98c446 (patch) | |
| tree | 88316b3ecff33954e792873ae2b9ad5ef4ea72af | |
| parent | 1de107a5a269fa71c9a69eba182fecea68e38a06 (diff) | |
| download | riscv-openocd-b4a4d5c7310c88ef263bfaaa060b5c249d98c446.zip riscv-openocd-b4a4d5c7310c88ef263bfaaa060b5c249d98c446.tar.gz riscv-openocd-b4a4d5c7310c88ef263bfaaa060b5c249d98c446.tar.bz2 | |
ARM: bugfix for "movt" disassembly
Use the correct bitfield to specify the register whose
top halfword gets replaced.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
| -rw-r--r-- | src/target/arm_disassembler.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c index 912e37c..587131b 100644 --- a/src/target/arm_disassembler.c +++ b/src/target/arm_disassembler.c @@ -3247,7 +3247,7 @@ static int t2ev_data_immed(uint32_t opcode, uint32_t address, case 0x0c: /* move constant to top 16 bits of register */ immed |= (opcode >> 4) & 0xf000; - sprintf(cp, "MOVT\tr%d, #%d\t; %#4.4x", rn, immed, immed); + sprintf(cp, "MOVT\tr%d, #%d\t; %#4.4x", rd, immed, immed); return ERROR_OK; case 0x10: case 0x12: |