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author | David Brownell <dbrownell@users.sourceforge.net> | 2010-01-07 16:30:09 -0800 |
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committer | David Brownell <dbrownell@users.sourceforge.net> | 2010-01-07 16:30:09 -0800 |
commit | a42bea654ce1316dd521b1c9beffa8f829bf8be0 (patch) | |
tree | 48f3c4d4a858f9a2568fe071fb5ef5a96fc15b7b | |
parent | e0b6e5deef2d7b0054058116b6ddf9c684053739 (diff) | |
download | riscv-openocd-a42bea654ce1316dd521b1c9beffa8f829bf8be0.zip riscv-openocd-a42bea654ce1316dd521b1c9beffa8f829bf8be0.tar.gz riscv-openocd-a42bea654ce1316dd521b1c9beffa8f829bf8be0.tar.bz2 |
ARM720: help/usage updates
Deprecate the "pass an instruction opcode" flavor of cp15
access in favor of the "arm mcr ..." and "arm mrc ..."
commands, which offer fewer ways to break things.
Use the same EBNF syntax in the code as for the user's guide.
Update User's Guide to say where to find those magic values
(which table in the ARM920 TRM).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
-rw-r--r-- | doc/openocd.texi | 12 | ||||
-rw-r--r-- | src/target/arm920t.c | 24 |
2 files changed, 24 insertions, 12 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi index ea23bf7..bf7402d 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -5978,13 +5978,21 @@ is an ARM920T (2x16kByte cache) or ARM922T (2x8kByte cache). @deffn Command {arm920t cp15} regnum [value] Display cp15 register @var{regnum}; else if a @var{value} is provided, that value is written to that register. +This uses "physical access" and the register number is as +shown in bits 38..33 of table 9-9 in the ARM920T TRM. +(Not all registers can be written.) @end deffn @deffn Command {arm920t cp15i} opcode [value [address]] -Interpreted access using cp15 @var{opcode}. +@emph{DEPRECATED -- avoid using this. +Use the @command{arm mrc} or @command{arm mcr} commands instead.} + +Interpreted access using ARM instruction @var{opcode}, which should +be the value of either an MRC or MCR instruction +(as shown tables 9-11, 9-12, and 9-13 in the ARM920T TRM). If no @var{value} is provided, the result is displayed. Else if that value is written using the specified @var{address}, -or using zero if no other address is not provided. +or using zero if no other address is provided. @end deffn @deffn Command {arm920t read_cache} filename diff --git a/src/target/arm920t.c b/src/target/arm920t.c index c5b7c88..29eb62d 100644 --- a/src/target/arm920t.c +++ b/src/target/arm920t.c @@ -1384,35 +1384,39 @@ static int arm920t_mcr(struct target *target, int cpnum, static const struct command_registration arm920t_exec_command_handlers[] = { { .name = "cp15", - .handler = &arm920t_handle_cp15_command, + .handler = arm920t_handle_cp15_command, .mode = COMMAND_EXEC, .help = "display/modify cp15 register", - .usage = "<num> [value]", + .usage = "regnum [value]", }, { .name = "cp15i", - .handler = &arm920t_handle_cp15i_command, + .handler = arm920t_handle_cp15i_command, .mode = COMMAND_EXEC, - .help = "display/modify cp15 (interpreted access)", - .usage = "<opcode> [value] [address]", + /* prefer using less error-prone "arm mcr" or "arm mrc" */ + .help = "display/modify cp15 register using ARM opcode" + " (DEPRECATED)", + .usage = "instruction [value [address]]", }, { .name = "cache_info", - .handler = &arm920t_handle_cache_info_command, + .handler = arm920t_handle_cache_info_command, .mode = COMMAND_EXEC, .help = "display information about target caches", }, { .name = "read_cache", - .handler = &arm920t_handle_read_cache_command, + .handler = arm920t_handle_read_cache_command, .mode = COMMAND_EXEC, - .help = "display I/D cache content", + .help = "dump I/D cache content to file", + .usage = "filename", }, { .name = "read_mmu", - .handler = &arm920t_handle_read_mmu_command, + .handler = arm920t_handle_read_mmu_command, .mode = COMMAND_EXEC, - .help = "display I/D mmu content", + .help = "dump I/D mmu content to file", + .usage = "filename", }, COMMAND_REGISTRATION_DONE }; |