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authorTomas Vanek <vanekt@fbl.cz>2019-12-20 23:56:08 +0100
committerTomas Vanek <vanekt@fbl.cz>2020-03-07 15:30:05 +0000
commita2e822834df52efef5e1bbcb91a6eb1afbf102db (patch)
tree0e5caf3d1daa7dfeb6cabc7f3163d6dd5bbc73f9
parent4e981bc27c36e696dc8ace3ab4bab534564770c1 (diff)
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helper/binarybuffer: fix clang static analyzer warnings
Writing bits to an uninitialized buffer generated false warnings. Zero buffers before setting them by buf_set_u32|64() (do it only if bit-by-bit copy loop is used, zeroed buffer is not necessary if a fast path write is used) Change-Id: I2f7f8ddb45b0cbd08d3e249534fc51f4b5cc6694 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5383 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
-rw-r--r--src/flash/nor/jtagspi.c2
-rw-r--r--src/helper/binarybuffer.h2
-rw-r--r--src/jtag/core.c2
-rw-r--r--src/jtag/tcl.c2
-rw-r--r--src/target/arm_jtag.c4
-rw-r--r--src/target/avr32_jtag.c2
-rw-r--r--src/target/esirisc_jtag.c2
-rw-r--r--src/target/etb.c12
-rw-r--r--src/target/etm.c8
-rw-r--r--src/target/ls1_sap.c4
-rw-r--r--src/target/mips_ejtag.c6
-rw-r--r--src/target/openrisc/or1k_tap_vjtag.c2
-rw-r--r--src/target/riscv/riscv-011.c4
-rw-r--r--src/target/riscv/riscv-013.c3
-rw-r--r--src/target/riscv/riscv.c8
-rw-r--r--src/target/xscale.c14
16 files changed, 40 insertions, 37 deletions
diff --git a/src/flash/nor/jtagspi.c b/src/flash/nor/jtagspi.c
index a9f2dd4..f6e311a 100644
--- a/src/flash/nor/jtagspi.c
+++ b/src/flash/nor/jtagspi.c
@@ -59,7 +59,7 @@ static void jtagspi_set_ir(struct flash_bank *bank)
{
struct jtagspi_flash_bank *info = bank->driver_priv;
struct scan_field field;
- uint8_t buf[4];
+ uint8_t buf[4] = { 0 };
LOG_DEBUG("loading jtagspi ir");
buf_set_u32(buf, 0, info->tap->ir_length, info->ir);
diff --git a/src/helper/binarybuffer.h b/src/helper/binarybuffer.h
index 7ac221e..3f2481d 100644
--- a/src/helper/binarybuffer.h
+++ b/src/helper/binarybuffer.h
@@ -33,6 +33,7 @@
* using the bits in @c value. This routine fast-paths writes
* of little-endian, byte-aligned, 32-bit words.
* @param _buffer The buffer whose bits will be set.
+ * Do not use uninitialized buffer or clang static analyzer emits a warning.
* @param first The bit offset in @c _buffer to start writing (0-31).
* @param num The number of bits from @c value to copy (1-32).
* @param value Up to 32 bits that will be copied to _buffer.
@@ -62,6 +63,7 @@ static inline void buf_set_u32(uint8_t *_buffer,
* using the bits in @c value. This routine fast-paths writes
* of little-endian, byte-aligned, 64-bit words.
* @param _buffer The buffer whose bits will be set.
+ * Do not use uninitialized buffer or clang static analyzer emits a warning.
* @param first The bit offset in @c _buffer to start writing (0-63).
* @param num The number of bits from @c value to copy (1-64).
* @param value Up to 64 bits that will be copied to _buffer.
diff --git a/src/jtag/core.c b/src/jtag/core.c
index 1d59712..c5011e5 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -1233,7 +1233,7 @@ static int jtag_examine_chain(void)
/* Add room for end-of-chain marker. */
max_taps++;
- uint8_t *idcode_buffer = malloc(max_taps * 4);
+ uint8_t *idcode_buffer = calloc(4, max_taps);
if (idcode_buffer == NULL)
return ERROR_JTAG_INIT_FAILED;
diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index ba0cb1d..734b9c1 100644
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -1131,7 +1131,7 @@ COMMAND_HANDLER(handle_irscan_command)
}
int field_size = tap->ir_length;
fields[i].num_bits = field_size;
- uint8_t *v = malloc(DIV_ROUND_UP(field_size, 8));
+ uint8_t *v = calloc(1, DIV_ROUND_UP(field_size, 8));
uint64_t value;
retval = parse_u64(CMD_ARGV[i * 2 + 1], &value);
diff --git a/src/target/arm_jtag.c b/src/target/arm_jtag.c
index 9b73d4e..49aca34 100644
--- a/src/target/arm_jtag.c
+++ b/src/target/arm_jtag.c
@@ -33,7 +33,7 @@ int arm_jtag_set_instr_inner(struct jtag_tap *tap,
uint32_t new_instr, void *no_verify_capture, tap_state_t end_state)
{
struct scan_field field;
- uint8_t t[4];
+ uint8_t t[4] = { 0 };
field.num_bits = tap->ir_length;
field.out_value = t;
@@ -56,7 +56,7 @@ int arm_jtag_scann_inner(struct arm_jtag *jtag_info, uint32_t new_scan_chain, ta
{
int retval = ERROR_OK;
- uint8_t out_value[4];
+ uint8_t out_value[4] = { 0 };
buf_set_u32(out_value, 0, jtag_info->scann_size, new_scan_chain);
struct scan_field field = { .num_bits = jtag_info->scann_size, .out_value = out_value, };
diff --git a/src/target/avr32_jtag.c b/src/target/avr32_jtag.c
index c17fbe7..6a4d4b3 100644
--- a/src/target/avr32_jtag.c
+++ b/src/target/avr32_jtag.c
@@ -35,7 +35,7 @@ static int avr32_jtag_set_instr(struct avr32_jtag *jtag_info, int new_instr)
if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != (uint32_t)new_instr) {
do {
struct scan_field field;
- uint8_t t[4];
+ uint8_t t[4] = { 0 };
uint8_t ret[4];
field.num_bits = tap->ir_length;
diff --git a/src/target/esirisc_jtag.c b/src/target/esirisc_jtag.c
index 333a622..700ae3a 100644
--- a/src/target/esirisc_jtag.c
+++ b/src/target/esirisc_jtag.c
@@ -36,7 +36,7 @@ static void esirisc_jtag_set_instr(struct esirisc_jtag *jtag_info, uint32_t new_
if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr) {
struct scan_field field;
- uint8_t t[4];
+ uint8_t t[4] = { 0 };
field.num_bits = tap->ir_length;
field.out_value = t;
diff --git a/src/target/etb.c b/src/target/etb.c
index 392c6ad..0c03c4d 100644
--- a/src/target/etb.c
+++ b/src/target/etb.c
@@ -176,13 +176,13 @@ static int etb_read_ram(struct etb *etb, uint32_t *data, int num_frames)
fields[0].in_value = NULL;
fields[1].num_bits = 7;
- uint8_t temp1;
+ uint8_t temp1 = 0;
fields[1].out_value = &temp1;
buf_set_u32(&temp1, 0, 7, 4);
fields[1].in_value = NULL;
fields[2].num_bits = 1;
- uint8_t temp2;
+ uint8_t temp2 = 0;
fields[2].out_value = &temp2;
buf_set_u32(&temp2, 0, 1, 0);
fields[2].in_value = NULL;
@@ -229,7 +229,7 @@ static int etb_read_reg_w_check(struct reg *reg,
fields[0].check_mask = NULL;
fields[1].num_bits = 7;
- uint8_t temp1;
+ uint8_t temp1 = 0;
fields[1].out_value = &temp1;
buf_set_u32(&temp1, 0, 7, reg_addr);
fields[1].in_value = NULL;
@@ -237,7 +237,7 @@ static int etb_read_reg_w_check(struct reg *reg,
fields[1].check_mask = NULL;
fields[2].num_bits = 1;
- uint8_t temp2;
+ uint8_t temp2 = 0;
fields[2].out_value = &temp2;
buf_set_u32(&temp2, 0, 1, 0);
fields[2].in_value = NULL;
@@ -310,13 +310,13 @@ static int etb_write_reg(struct reg *reg, uint32_t value)
fields[0].in_value = NULL;
fields[1].num_bits = 7;
- uint8_t temp1;
+ uint8_t temp1 = 0;
fields[1].out_value = &temp1;
buf_set_u32(&temp1, 0, 7, reg_addr);
fields[1].in_value = NULL;
fields[2].num_bits = 1;
- uint8_t temp2;
+ uint8_t temp2 = 0;
fields[2].out_value = &temp2;
buf_set_u32(&temp2, 0, 1, 1);
fields[2].in_value = NULL;
diff --git a/src/target/etm.c b/src/target/etm.c
index d1cfe61..5218a9e 100644
--- a/src/target/etm.c
+++ b/src/target/etm.c
@@ -533,7 +533,7 @@ static int etm_read_reg_w_check(struct reg *reg,
fields[0].check_mask = NULL;
fields[1].num_bits = 7;
- uint8_t temp1;
+ uint8_t temp1 = 0;
fields[1].out_value = &temp1;
buf_set_u32(&temp1, 0, 7, reg_addr);
fields[1].in_value = NULL;
@@ -541,7 +541,7 @@ static int etm_read_reg_w_check(struct reg *reg,
fields[1].check_mask = NULL;
fields[2].num_bits = 1;
- uint8_t temp2;
+ uint8_t temp2 = 0;
fields[2].out_value = &temp2;
buf_set_u32(&temp2, 0, 1, 0);
fields[2].in_value = NULL;
@@ -620,13 +620,13 @@ static int etm_write_reg(struct reg *reg, uint32_t value)
fields[0].in_value = NULL;
fields[1].num_bits = 7;
- uint8_t tmp2;
+ uint8_t tmp2 = 0;
fields[1].out_value = &tmp2;
buf_set_u32(&tmp2, 0, 7, reg_addr);
fields[1].in_value = NULL;
fields[2].num_bits = 1;
- uint8_t tmp3;
+ uint8_t tmp3 = 0;
fields[2].out_value = &tmp3;
buf_set_u32(&tmp3, 0, 1, 1);
fields[2].in_value = NULL;
diff --git a/src/target/ls1_sap.c b/src/target/ls1_sap.c
index bc46ed4..330042f 100644
--- a/src/target/ls1_sap.c
+++ b/src/target/ls1_sap.c
@@ -113,7 +113,7 @@ static void ls1_sap_set_instr(struct jtag_tap *tap, uint32_t new_instr)
static void ls1_sap_set_addr_high(struct jtag_tap *tap, uint16_t addr_high)
{
struct scan_field field;
- uint8_t buf[2];
+ uint8_t buf[2] = { 0 };
ls1_sap_set_instr(tap, 0x21);
@@ -130,7 +130,7 @@ static void ls1_sap_memory_cmd(struct jtag_tap *tap, uint32_t address,
int32_t size, bool rnw)
{
struct scan_field field;
- uint8_t cmd[8];
+ uint8_t cmd[8] = { 0 };
ls1_sap_set_instr(tap, 0x24);
diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index 6d35e21..00bafd0 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -43,7 +43,7 @@ void mips_ejtag_set_instr(struct mips_ejtag *ejtag_info, uint32_t new_instr)
struct scan_field field;
field.num_bits = tap->ir_length;
- uint8_t t[4];
+ uint8_t t[4] = { 0 };
field.out_value = t;
buf_set_u32(t, 0, field.num_bits, new_instr);
@@ -100,7 +100,7 @@ int mips_ejtag_drscan_64(struct mips_ejtag *ejtag_info, uint64_t *data)
if (tap == NULL)
return ERROR_FAIL;
struct scan_field field;
- uint8_t t[8], r[8];
+ uint8_t t[8] = { 0 }, r[8];
int retval;
field.num_bits = 64;
@@ -130,7 +130,7 @@ void mips_ejtag_drscan_32_queued(struct mips_ejtag *ejtag_info, uint32_t data_ou
struct scan_field field;
field.num_bits = 32;
- uint8_t scan_out[4];
+ uint8_t scan_out[4] = { 0 };
field.out_value = scan_out;
buf_set_u32(scan_out, 0, field.num_bits, data_out);
diff --git a/src/target/openrisc/or1k_tap_vjtag.c b/src/target/openrisc/or1k_tap_vjtag.c
index 607451a..db10f10 100644
--- a/src/target/openrisc/or1k_tap_vjtag.c
+++ b/src/target/openrisc/or1k_tap_vjtag.c
@@ -149,7 +149,7 @@ static int or1k_tap_vjtag_init(struct or1k_jtag *jtag_info)
* into the USER1 DR is sufficient to cover the most conservative case for m and n.
*/
- uint8_t t[4];
+ uint8_t t[4] = { 0 };
struct scan_field field;
struct jtag_tap *tap = jtag_info->tap;
diff --git a/src/target/riscv/riscv-011.c b/src/target/riscv/riscv-011.c
index eded862..cb7b744 100644
--- a/src/target/riscv/riscv-011.c
+++ b/src/target/riscv/riscv-011.c
@@ -280,7 +280,7 @@ static uint32_t dtmcontrol_scan(struct target *target, uint32_t out)
{
struct scan_field field;
uint8_t in_value[4];
- uint8_t out_value[4];
+ uint8_t out_value[4] = { 0 };
buf_set_u32(out_value, 0, 32, out);
@@ -422,7 +422,7 @@ static dbus_status_t dbus_scan(struct target *target, uint16_t *address_in,
{
riscv011_info_t *info = get_info(target);
uint8_t in[8] = {0};
- uint8_t out[8];
+ uint8_t out[8] = {0};
struct scan_field field = {
.num_bits = info->addrbits + DBUS_OP_SIZE + DBUS_DATA_SIZE,
.out_value = out,
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c
index 1e5c027..66218b7 100644
--- a/src/target/riscv/riscv-013.c
+++ b/src/target/riscv/riscv-013.c
@@ -402,7 +402,7 @@ static uint32_t dtmcontrol_scan(struct target *target, uint32_t out)
{
struct scan_field field;
uint8_t in_value[4];
- uint8_t out_value[4];
+ uint8_t out_value[4] = { 0 };
buf_set_u32(out_value, 0, 32, out);
@@ -468,6 +468,7 @@ static dmi_status_t dmi_scan(struct target *target, uint32_t *address_in,
}
memset(in, 0, num_bytes);
+ memset(out, 0, num_bytes);
assert(info->abits != 0);
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c
index 8b5a361..1d6f666 100644
--- a/src/target/riscv/riscv.c
+++ b/src/target/riscv/riscv.c
@@ -203,7 +203,7 @@ static uint32_t dtmcontrol_scan(struct target *target, uint32_t out)
{
struct scan_field field;
uint8_t in_value[4];
- uint8_t out_value[4];
+ uint8_t out_value[4] = { 0 };
buf_set_u32(out_value, 0, 32, out);
@@ -540,7 +540,7 @@ int riscv_add_breakpoint(struct target *target, struct breakpoint *breakpoint)
return ERROR_FAIL;
}
- uint8_t buff[4];
+ uint8_t buff[4] = { 0 };
buf_set_u32(buff, 0, breakpoint->length * CHAR_BIT, breakpoint->length == 4 ? ebreak() : ebreak_c());
int const retval = target_write_memory(target, breakpoint->address, 2, breakpoint->length / 2, buff);
@@ -1047,7 +1047,7 @@ static int riscv_run_algorithm(struct target *target, int num_mem_params,
/* Disable Interrupts before attempting to run the algorithm. */
uint64_t current_mstatus;
- uint8_t mstatus_bytes[8];
+ uint8_t mstatus_bytes[8] = { 0 };
LOG_DEBUG("Disabling Interrupts");
struct reg *reg_mstatus = register_get_by_name(target->reg_cache,
@@ -1103,7 +1103,7 @@ static int riscv_run_algorithm(struct target *target, int num_mem_params,
reg_mstatus->type->set(reg_mstatus, mstatus_bytes);
/* Restore registers */
- uint8_t buf[8];
+ uint8_t buf[8] = { 0 };
buf_set_u64(buf, 0, info->xlen[0], saved_pc);
if (reg_pc->type->set(reg_pc, buf) != ERROR_OK)
return ERROR_FAIL;
diff --git a/src/target/xscale.c b/src/target/xscale.c
index 3ef8922..e579965 100644
--- a/src/target/xscale.c
+++ b/src/target/xscale.c
@@ -129,7 +129,7 @@ static const struct xscale_reg xscale_reg_arch_info[] = {
/* convenience wrapper to access XScale specific registers */
static int xscale_set_reg_u32(struct reg *reg, uint32_t value)
{
- uint8_t buf[4];
+ uint8_t buf[4] = { 0 };
buf_set_u32(buf, 0, 32, value);
@@ -154,7 +154,7 @@ static int xscale_jtag_set_instr(struct jtag_tap *tap, uint32_t new_instr, tap_s
if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr) {
struct scan_field field;
- uint8_t scratch[4];
+ uint8_t scratch[4] = { 0 };
memset(&field, 0, sizeof field);
field.num_bits = tap->ir_length;
@@ -514,7 +514,7 @@ static int xscale_send(struct target *target, const uint8_t *buffer, int count,
TAP_IDLE);
static const uint8_t t0;
- uint8_t t1[4];
+ uint8_t t1[4] = { 0 };
static const uint8_t t2 = 1;
struct scan_field fields[3] = {
{ .num_bits = 3, .out_value = &t0 },
@@ -645,8 +645,8 @@ static unsigned int parity(unsigned int v)
static int xscale_load_ic(struct target *target, uint32_t va, uint32_t buffer[8])
{
struct xscale_common *xscale = target_to_xscale(target);
- uint8_t packet[4];
- uint8_t cmd;
+ uint8_t packet[4] = { 0 };
+ uint8_t cmd = 0;
int word;
struct scan_field fields[2];
@@ -699,8 +699,8 @@ static int xscale_load_ic(struct target *target, uint32_t va, uint32_t buffer[8]
static int xscale_invalidate_ic_line(struct target *target, uint32_t va)
{
struct xscale_common *xscale = target_to_xscale(target);
- uint8_t packet[4];
- uint8_t cmd;
+ uint8_t packet[4] = { 0 };
+ uint8_t cmd = 0;
struct scan_field fields[2];
xscale_jtag_set_instr(target->tap,