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| author | Tomas Vanek <vanekt@fbl.cz> | 2021-11-30 10:33:41 +0100 |
|---|---|---|
| committer | Tomas Vanek <vanekt@fbl.cz> | 2022-04-24 08:27:28 +0000 |
| commit | 9de084e0067a86b8040f8ea2c3f46dff0b9e6a70 (patch) | |
| tree | f4d5327bf60b5d7fd9c00e0604902eb4856f7f2f | |
| parent | 1c07229f8ca72e0f244e2289cefa28b65e21e774 (diff) | |
| download | riscv-openocd-9de084e0067a86b8040f8ea2c3f46dff0b9e6a70.zip riscv-openocd-9de084e0067a86b8040f8ea2c3f46dff0b9e6a70.tar.gz riscv-openocd-9de084e0067a86b8040f8ea2c3f46dff0b9e6a70.tar.bz2 | |
flash/nor/stm32f1x: add can_load_options flag for GD32F1x0, F3x0 and E23x
According to GigaDevice user manuals the devices have OBRLD bit in FMC_CTL
register which is functionally compatible with OBL_LAUNCH @ FLASH_CR
of STM32 counterparts.
Change-Id: I84d231b38815fcb6452fd73b9153b269cce3b737
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6759
Tested-by: jenkins
Reviewed-by: Andrzej Sierżęga <asier70@gmail.com>
| -rw-r--r-- | src/flash/nor/stm32f1x.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c index dea8df7..c750ff0 100644 --- a/src/flash/nor/stm32f1x.c +++ b/src/flash/nor/stm32f1x.c @@ -896,10 +896,12 @@ static int stm32x_probe(struct flash_bank *bank) stm32x_info->user_data_offset = 16; stm32x_info->option_offset = 6; max_flash_size_in_kb = 64; + stm32x_info->can_load_options = true; break; case 0x1704: /* gd32f3x0 */ stm32x_info->user_data_offset = 16; stm32x_info->option_offset = 6; + stm32x_info->can_load_options = true; break; case 0x1906: /* gd32vf103 */ break; @@ -907,6 +909,7 @@ static int stm32x_probe(struct flash_bank *bank) stm32x_info->user_data_offset = 16; stm32x_info->option_offset = 6; max_flash_size_in_kb = 64; + stm32x_info->can_load_options = true; break; } break; |