diff options
author | ntfreak <ntfreak@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-04-14 07:26:13 +0000 |
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committer | ntfreak <ntfreak@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-04-14 07:26:13 +0000 |
commit | 80d20326a7fafc0f6ed865df2211bc9e609265fb (patch) | |
tree | a9ec00ca6d60b5832f6b42b35b27449bf33c15e4 | |
parent | 53c41935cd72687ffb7f6b408a824f8e40f82ee9 (diff) | |
download | riscv-openocd-80d20326a7fafc0f6ed865df2211bc9e609265fb.zip riscv-openocd-80d20326a7fafc0f6ed865df2211bc9e609265fb.tar.gz riscv-openocd-80d20326a7fafc0f6ed865df2211bc9e609265fb.tar.bz2 |
- split str71x driver into banks
- support new str91x/str9xpec devices
- update target scripts and docs for changes
git-svn-id: svn://svn.berlios.de/openocd/trunk@577 b42882b7-edfa-0310-969c-e2dbd0fdcd60
-rw-r--r-- | src/flash/str7x.c | 156 | ||||
-rw-r--r-- | src/flash/str7x.h | 21 | ||||
-rw-r--r-- | src/flash/str9x.c | 87 | ||||
-rw-r--r-- | src/flash/str9x.h | 8 | ||||
-rw-r--r-- | src/flash/str9xpec.c | 65 | ||||
-rw-r--r-- | src/flash/str9xpec.h | 6 | ||||
-rw-r--r-- | src/target/event/str912_reset.script | 17 | ||||
-rw-r--r-- | src/target/target/stm32.cfg | 2 | ||||
-rw-r--r-- | src/target/target/str710.cfg | 1 | ||||
-rw-r--r-- | src/target/target/str912.cfg | 3 |
10 files changed, 151 insertions, 215 deletions
diff --git a/src/flash/str7x.c b/src/flash/str7x.c index 70f312d..0e35bcc 100644 --- a/src/flash/str7x.c +++ b/src/flash/str7x.c @@ -35,7 +35,7 @@ #include <string.h> #include <unistd.h> -str7x_mem_layout_t mem_layout[] = { +str7x_mem_layout_t mem_layout_str7bank0[] = { {0x00000000, 0x02000, 0x01}, {0x00002000, 0x02000, 0x02}, {0x00004000, 0x02000, 0x04}, @@ -43,9 +43,12 @@ str7x_mem_layout_t mem_layout[] = { {0x00008000, 0x08000, 0x10}, {0x00010000, 0x10000, 0x20}, {0x00020000, 0x10000, 0x40}, - {0x00030000, 0x10000, 0x80}, - {0x000C0000, 0x02000, 0x10000}, - {0x000C2000, 0x02000, 0x20000}, + {0x00030000, 0x10000, 0x80} +}; + +str7x_mem_layout_t mem_layout_str7bank1[] = { + {0x00000000, 0x02000, 0x10000}, + {0x00002000, 0x02000, 0x20000} }; int str7x_register_commands(struct command_context_s *cmd_ctx); @@ -87,7 +90,8 @@ int str7x_register_commands(struct command_context_s *cmd_ctx) int str7x_get_flash_adr(struct flash_bank_s *bank, u32 reg) { - return (bank->base | reg); + str7x_flash_bank_t *str7x_info = bank->driver_priv; + return (str7x_info->register_base | reg); } int str7x_build_block_list(struct flash_bank_s *bank) @@ -95,12 +99,13 @@ int str7x_build_block_list(struct flash_bank_s *bank) str7x_flash_bank_t *str7x_info = bank->driver_priv; int i; - int num_sectors = 0, b0_sectors = 0, b1_sectors = 0; + int num_sectors; + int b0_sectors = 0, b1_sectors = 0; switch (bank->size) { case 16 * 1024: - b0_sectors = 2; + b1_sectors = 2; break; case 64 * 1024: b0_sectors = 5; @@ -115,42 +120,31 @@ int str7x_build_block_list(struct flash_bank_s *bank) LOG_ERROR("BUG: unknown bank->size encountered"); exit(-1); } - - if( str7x_info->bank1 == 1 ) - { - b1_sectors += 2; - } - + num_sectors = b0_sectors + b1_sectors; bank->num_sectors = num_sectors; bank->sectors = malloc(sizeof(flash_sector_t) * num_sectors); str7x_info->sector_bits = malloc(sizeof(u32) * num_sectors); - str7x_info->sector_bank = malloc(sizeof(u32) * num_sectors); num_sectors = 0; for (i = 0; i < b0_sectors; i++) { - bank->sectors[num_sectors].offset = mem_layout[i].sector_start; - bank->sectors[num_sectors].size = mem_layout[i].sector_size; + bank->sectors[num_sectors].offset = mem_layout_str7bank0[i].sector_start; + bank->sectors[num_sectors].size = mem_layout_str7bank0[i].sector_size; bank->sectors[num_sectors].is_erased = -1; bank->sectors[num_sectors].is_protected = 1; - str7x_info->sector_bank[num_sectors] = 0; - str7x_info->sector_bits[num_sectors++] = mem_layout[i].sector_bit; + str7x_info->sector_bits[num_sectors++] = mem_layout_str7bank0[i].sector_bit; } - if (b1_sectors) + for (i = 0; i < b1_sectors; i++) { - for (i = 8; i < 10; i++) - { - bank->sectors[num_sectors].offset = mem_layout[i].sector_start; - bank->sectors[num_sectors].size = mem_layout[i].sector_size; - bank->sectors[num_sectors].is_erased = -1; - bank->sectors[num_sectors].is_protected = 1; - str7x_info->sector_bank[num_sectors] = 1; - str7x_info->sector_bits[num_sectors++] = mem_layout[i].sector_bit; - } + bank->sectors[num_sectors].offset = mem_layout_str7bank1[i].sector_start; + bank->sectors[num_sectors].size = mem_layout_str7bank1[i].sector_size; + bank->sectors[num_sectors].is_erased = -1; + bank->sectors[num_sectors].is_protected = 1; + str7x_info->sector_bits[num_sectors++] = mem_layout_str7bank1[i].sector_bit; } return ERROR_OK; @@ -172,38 +166,22 @@ int str7x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char bank->driver_priv = str7x_info; /* set default bits for str71x flash */ - str7x_info->bank1 = 1; str7x_info->busy_bits = (FLASH_LOCK|FLASH_BSYA1|FLASH_BSYA0); str7x_info->disable_bit = (1<<1); if (strcmp(args[6], "STR71x") == 0) { - if (bank->base != 0x40000000) - { - LOG_WARNING("overriding flash base address for STR71x device with 0x40000000"); - bank->base = 0x40000000; - } + str7x_info->register_base = 0x40100000; } else if (strcmp(args[6], "STR73x") == 0) { - str7x_info->bank1 = 0; + str7x_info->register_base = 0x80100000; str7x_info->busy_bits = (FLASH_LOCK|FLASH_BSYA0); - - if (bank->base != 0x80000000) - { - LOG_WARNING("overriding flash base address for STR73x device with 0x80000000"); - bank->base = 0x80000000; - } } else if (strcmp(args[6], "STR75x") == 0) { + str7x_info->register_base = 0x20100000; str7x_info->disable_bit = (1<<0); - - if (bank->base != 0x20000000) - { - LOG_WARNING("overriding flash base address for STR75x device with 0x20000000"); - bank->base = 0x20000000; - } } else { @@ -239,7 +217,6 @@ u32 str7x_result(struct flash_bank_s *bank) return retval; } - int str7x_protect_check(struct flash_bank_s *bank) { str7x_flash_bank_t *str7x_info = bank->driver_priv; @@ -274,7 +251,7 @@ int str7x_erase(struct flash_bank_s *bank, int first, int last) int i; u32 cmd; u32 retval; - u32 b0_sectors = 0, b1_sectors = 0; + u32 sectors = 0; if (bank->target->state != TARGET_HALTED) { @@ -283,70 +260,33 @@ int str7x_erase(struct flash_bank_s *bank, int first, int last) for (i = first; i <= last; i++) { - if (str7x_info->sector_bank[i] == 0) - b0_sectors |= str7x_info->sector_bits[i]; - else if (str7x_info->sector_bank[i] == 1) - b1_sectors |= str7x_info->sector_bits[i]; - else - LOG_ERROR("BUG: str7x_info->sector_bank[i] neither 0 nor 1 (%i)", str7x_info->sector_bank[i]); + sectors |= str7x_info->sector_bits[i]; } - if (b0_sectors) - { - LOG_DEBUG("b0_sectors: 0x%x", b0_sectors); - - /* clear FLASH_ER register */ - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0); - - cmd = FLASH_SER; - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); - - cmd = b0_sectors; - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR1), cmd); - - cmd = FLASH_SER|FLASH_WMS; - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); - - while (((retval = str7x_status(bank)) & str7x_info->busy_bits)){ - usleep(1000); - } - - retval = str7x_result(bank); - - if (retval) - { - LOG_ERROR("error erasing flash bank, FLASH_ER: 0x%x", retval); - return ERROR_FLASH_OPERATION_FAILED; - } + LOG_DEBUG("sectors: 0x%x", sectors); + + /* clear FLASH_ER register */ + target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0); + + cmd = FLASH_SER; + target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); + + cmd = sectors; + target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR1), cmd); + + cmd = FLASH_SER|FLASH_WMS; + target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); + + while (((retval = str7x_status(bank)) & str7x_info->busy_bits)){ + usleep(1000); } - if (b1_sectors) + retval = str7x_result(bank); + + if (retval) { - LOG_DEBUG("b1_sectors: 0x%x", b1_sectors); - - /* clear FLASH_ER register */ - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0); - - cmd = FLASH_SER; - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); - - cmd = b1_sectors; - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR1), cmd); - - cmd = FLASH_SER|FLASH_WMS; - target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd); - - while (((retval = str7x_status(bank)) & str7x_info->busy_bits)){ - usleep(1000); - } - - retval = str7x_result(bank); - - if (retval) - { - LOG_ERROR("error erasing flash bank, FLASH_ER: 0x%x", retval); - return ERROR_FLASH_OPERATION_FAILED; - } + LOG_ERROR("error erasing flash bank, FLASH_ER: 0x%x", retval); + return ERROR_FLASH_OPERATION_FAILED; } for (i = first; i <= last; i++) diff --git a/src/flash/str7x.h b/src/flash/str7x.h index bbb64eb..a3372f5 100644 --- a/src/flash/str7x.h +++ b/src/flash/str7x.h @@ -25,11 +25,10 @@ typedef struct str7x_flash_bank_s { - int bank1; - u32 *sector_bank; u32 *sector_bits; u32 disable_bit; u32 busy_bits; + u32 register_base; working_area_t *write_algorithm; } str7x_flash_bank_t; @@ -51,15 +50,15 @@ enum str7x_status_codes /* Flash registers */ -#define FLASH_CR0 0x00100000 -#define FLASH_CR1 0x00100004 -#define FLASH_DR0 0x00100008 -#define FLASH_DR1 0x0010000C -#define FLASH_AR 0x00100010 -#define FLASH_ER 0x00100014 -#define FLASH_NVWPAR 0x0010DFB0 -#define FLASH_NVAPR0 0x0010DFB8 -#define FLASH_NVAPR1 0x0010DFBC +#define FLASH_CR0 0x00000000 +#define FLASH_CR1 0x00000004 +#define FLASH_DR0 0x00000008 +#define FLASH_DR1 0x0000000C +#define FLASH_AR 0x00000010 +#define FLASH_ER 0x00000014 +#define FLASH_NVWPAR 0x0000DFB0 +#define FLASH_NVAPR0 0x0000DFB8 +#define FLASH_NVAPR1 0x0000DFBC /* FLASH_CR0 register bits */ diff --git a/src/flash/str9x.c b/src/flash/str9x.c index 68fefc1..30c4e98 100644 --- a/src/flash/str9x.c +++ b/src/flash/str9x.c @@ -36,24 +36,6 @@ #include <string.h> #include <unistd.h> -str9x_mem_layout_t mem_layout_str9bank0[] = { - {0x00000000, 0x10000, 0x01}, - {0x00010000, 0x10000, 0x02}, - {0x00020000, 0x10000, 0x04}, - {0x00030000, 0x10000, 0x08}, - {0x00040000, 0x10000, 0x10}, - {0x00050000, 0x10000, 0x20}, - {0x00060000, 0x10000, 0x40}, - {0x00070000, 0x10000, 0x80}, -}; - -str9x_mem_layout_t mem_layout_str9bank1[] = { - {0x00000000, 0x02000, 0x100}, - {0x00002000, 0x02000, 0x200}, - {0x00004000, 0x02000, 0x400}, - {0x00006000, 0x02000, 0x800} -}; - static u32 bank1start = 0x00080000; int str9x_register_commands(struct command_context_s *cmd_ctx); @@ -98,9 +80,14 @@ int str9x_build_block_list(struct flash_bank_s *bank) str9x_flash_bank_t *str9x_info = bank->driver_priv; int i; - int num_sectors = 0; + int num_sectors; int b0_sectors = 0, b1_sectors = 0; - + u32 offset = 0; + + /* set if we have large flash str9 */ + str9x_info->variant = 0; + str9x_info->bank1 = 0; + switch (bank->size) { case (256 * 1024): @@ -109,7 +96,24 @@ int str9x_build_block_list(struct flash_bank_s *bank) case (512 * 1024): b0_sectors = 8; break; + case (1024 * 1024): + bank1start = 0x00100000; + str9x_info->variant = 1; + b0_sectors = 16; + break; + case (2048 * 1024): + bank1start = 0x00200000; + str9x_info->variant = 1; + b0_sectors = 32; + break; + case (128 * 1024): + str9x_info->variant = 1; + str9x_info->bank1 = 1; + b1_sectors = 8; + bank1start = bank->base; + break; case (32 * 1024): + str9x_info->bank1 = 1; b1_sectors = 4; bank1start = bank->base; break; @@ -128,20 +132,25 @@ int str9x_build_block_list(struct flash_bank_s *bank) for (i = 0; i < b0_sectors; i++) { - bank->sectors[num_sectors].offset = mem_layout_str9bank0[i].sector_start; - bank->sectors[num_sectors].size = mem_layout_str9bank0[i].sector_size; + bank->sectors[num_sectors].offset = offset; + bank->sectors[num_sectors].size = 0x10000; + offset += bank->sectors[i].size; bank->sectors[num_sectors].is_erased = -1; bank->sectors[num_sectors].is_protected = 1; - str9x_info->sector_bits[num_sectors++] = mem_layout_str9bank0[i].sector_bit; + str9x_info->sector_bits[num_sectors++] = (1<<i); } for (i = 0; i < b1_sectors; i++) { - bank->sectors[num_sectors].offset = mem_layout_str9bank1[i].sector_start; - bank->sectors[num_sectors].size = mem_layout_str9bank1[i].sector_size; + bank->sectors[num_sectors].offset = offset; + bank->sectors[num_sectors].size = str9x_info->variant == 0 ? 0x2000 : 0x4000; + offset += bank->sectors[i].size; bank->sectors[num_sectors].is_erased = -1; bank->sectors[num_sectors].is_protected = 1; - str9x_info->sector_bits[num_sectors++] = mem_layout_str9bank1[i].sector_bit; + if (str9x_info->variant) + str9x_info->sector_bits[num_sectors++] = (1<<i); + else + str9x_info->sector_bits[num_sectors++] = (1<<(i+8)); } return ERROR_OK; @@ -176,7 +185,7 @@ int str9x_protect_check(struct flash_bank_s *bank) int i; u32 adr; - u16 status; + u32 status = 0; if (bank->target->state != TARGET_HALTED) { @@ -185,10 +194,28 @@ int str9x_protect_check(struct flash_bank_s *bank) /* read level one protection */ - adr = bank1start + 0x10; + if (str9x_info->variant) + { + if (str9x_info->bank1) + { + adr = bank1start + 0x18; + target_write_u16(target, adr, 0x90); + target_read_u16(target, adr, (u16*)&status); + } + else + { + adr = bank1start + 0x14; + target_write_u16(target, adr, 0x90); + target_read_u32(target, adr, &status); + } + } + else + { + adr = bank1start + 0x10; + target_write_u16(target, adr, 0x90); + target_read_u16(target, adr, (u16*)&status); + } - target_write_u16(target, adr, 0x90); - target_read_u16(target, adr, &status); target_write_u16(target, adr, 0xFF); for (i = 0; i < bank->num_sectors; i++) diff --git a/src/flash/str9x.h b/src/flash/str9x.h index 6e589c0..f3100ce 100644 --- a/src/flash/str9x.h +++ b/src/flash/str9x.h @@ -26,6 +26,8 @@ typedef struct str9x_flash_bank_s { u32 *sector_bits; + int variant; + int bank1; working_area_t *write_algorithm; } str9x_flash_bank_t; @@ -55,11 +57,5 @@ enum str9x_status_codes #define FLASH_SR 0x5400001C /* Status Register */ #define FLASH_BCE5ADDR 0x54000020 /* BC Fifth Entry Target Address Register */ -typedef struct str9x_mem_layout_s { - u32 sector_start; - u32 sector_size; - u32 sector_bit; -} str9x_mem_layout_t; - #endif /* STR9X_H */ diff --git a/src/flash/str9xpec.c b/src/flash/str9xpec.c index b1bb3e9..b6f966f 100644 --- a/src/flash/str9xpec.c +++ b/src/flash/str9xpec.c @@ -37,21 +37,6 @@ #include <unistd.h> #include <getopt.h> -str9xpec_mem_layout_t mem_layout_str9pec[] = { - {0x00000000, 0x10000, 0}, - {0x00010000, 0x10000, 1}, - {0x00020000, 0x10000, 2}, - {0x00030000, 0x10000, 3}, - {0x00040000, 0x10000, 4}, - {0x00050000, 0x10000, 5}, - {0x00060000, 0x10000, 6}, - {0x00070000, 0x10000, 7}, - {0x00080000, 0x02000, 32}, - {0x00082000, 0x02000, 33}, - {0x00084000, 0x02000, 34}, - {0x00086000, 0x02000, 35} -}; - int str9xpec_register_commands(struct command_context_s *cmd_ctx); int str9xpec_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank); int str9xpec_erase(struct flash_bank_s *bank, int first, int last); @@ -279,8 +264,11 @@ int str9xpec_build_block_list(struct flash_bank_s *bank) str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv; int i; - int num_sectors = 0, b0_sectors = 0; - + int num_sectors; + int b0_sectors = 0, b1_sectors = 0; + u32 offset = 0; + int b1_size = 0x2000; + switch (bank->size) { case (256 * 1024): @@ -289,14 +277,25 @@ int str9xpec_build_block_list(struct flash_bank_s *bank) case (512 * 1024): b0_sectors = 8; break; + case (1024 * 1024): + b0_sectors = 16; + break; + case (2048 * 1024): + b0_sectors = 32; + break; + case (128 * 1024): + b1_size = 0x4000; + b1_sectors = 8; + break; + case (32 * 1024): + b1_sectors = 4; + break; default: LOG_ERROR("BUG: unknown bank->size encountered"); exit(-1); } - /* include bank 1 sectors */ - num_sectors = b0_sectors + 4; - bank->size += (32 * 1024); + num_sectors = b0_sectors + b1_sectors; bank->num_sectors = num_sectors; bank->sectors = malloc(sizeof(flash_sector_t) * num_sectors); @@ -306,22 +305,24 @@ int str9xpec_build_block_list(struct flash_bank_s *bank) for (i = 0; i < b0_sectors; i++) { - bank->sectors[num_sectors].offset = mem_layout_str9pec[i].sector_start; - bank->sectors[num_sectors].size = mem_layout_str9pec[i].sector_size; + bank->sectors[num_sectors].offset = offset; + bank->sectors[num_sectors].size = 0x10000; + offset += bank->sectors[i].size; bank->sectors[num_sectors].is_erased = -1; bank->sectors[num_sectors].is_protected = 1; - str9xpec_info->sector_bits[num_sectors++] = mem_layout_str9pec[i].sector_bit; + str9xpec_info->sector_bits[num_sectors++] = i; } - - for (i = 8; i < 12; i++) + + for (i = 0; i < b1_sectors; i++) { - bank->sectors[num_sectors].offset = mem_layout_str9pec[i].sector_start; - bank->sectors[num_sectors].size = mem_layout_str9pec[i].sector_size; + bank->sectors[num_sectors].offset = offset; + bank->sectors[num_sectors].size = b1_size; + offset += bank->sectors[i].size; bank->sectors[num_sectors].is_erased = -1; bank->sectors[num_sectors].is_protected = 1; - str9xpec_info->sector_bits[num_sectors++] = mem_layout_str9pec[i].sector_bit; + str9xpec_info->sector_bits[num_sectors++] = i + 32; } - + return ERROR_OK; } @@ -343,12 +344,6 @@ int str9xpec_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, ch str9xpec_info = malloc(sizeof(str9xpec_flash_controller_t)); bank->driver_priv = str9xpec_info; - if (bank->base != 0x00000000) - { - LOG_WARNING("overriding flash base address for STR91x device with 0x00000000"); - bank->base = 0x00000000; - } - /* find out jtag position of flash controller * it is always after the arm966 core */ diff --git a/src/flash/str9xpec.h b/src/flash/str9xpec.h index 52340a5..dcc9011 100644 --- a/src/flash/str9xpec.h +++ b/src/flash/str9xpec.h @@ -66,12 +66,6 @@ enum str9xpec_status_codes #define ISC_STATUS_BUSY 0x04 #define ISC_STATUS_ERROR 0x03 -typedef struct mem_layout_str9pec { - u32 sector_start; - u32 sector_size; - u32 sector_bit; -} str9xpec_mem_layout_t; - /* Option bytes definitions */ #define STR9XPEC_OPT_CSMAPBIT 48 diff --git a/src/target/event/str912_reset.script b/src/target/event/str912_reset.script index c3d6810..33c6204 100644 --- a/src/target/event/str912_reset.script +++ b/src/target/event/str912_reset.script @@ -1,22 +1,5 @@ -mww 0xFFFFFD44, 0x00008000 #Disable watchdog -mww 0xFFFFFC20, 0x00000601 #Enable Main oscillator -sleep 20 -mww 0xFFFFFC30, 0x00000001 #Switch master clock to CPU clock, write 1 to PMC_MCKR -sleep 20 - - -# -- Remap Flash Bank 0 at address 0x0 and Bank 1 at address 0x80000, -# when the bank 0 is the boot bank, then enable the Bank 1. */ - -mww 0x54000000, 0x4 #BOOT BANK Size = (2^4) * 32 = 512KB -mww 0x54000004, 0x2 #NON BOOT BANK Size = (2^2) * 8 = 32KB -mww 0x5400000C, 0x0 #BOOT BANK Address = 0x0 -mww 0x54000010, 0x20000 #NON BOOT BANK Address = 0x80000 -mww 0x54000018, 0x18 #Enable CS on both banks - # -- Enable 96K RAM */ mww 0x5C002034, 0x0191 # PFQBC enabled / DTCM & AHB wait-states disabled -arm966e cp15 15, 0x60000 #Set bits 17-18 (DTCM/ITCM order bits) of the Core Configuration Control Register str9x flash_config 0 4 2 0 0x80000 flash protect 0 0 7 off diff --git a/src/target/target/stm32.cfg b/src/target/target/stm32.cfg index 0cffeb1..8a93087 100644 --- a/src/target/target/stm32.cfg +++ b/src/target/target/stm32.cfg @@ -17,7 +17,7 @@ run_and_halt_time 0 30 working_area 0 0x20000000 16384 nobackup #flash bank str7x <base> <size> 0 0 <target#> <variant> -flash bank stm32x 0x00000000 0x00000000 0 0 0 +flash bank stm32x 0 0 0 0 0 # For more information about the configuration files, take a look at: # http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger diff --git a/src/target/target/str710.cfg b/src/target/target/str710.cfg index 2d27624..18a4795 100644 --- a/src/target/target/str710.cfg +++ b/src/target/target/str710.cfg @@ -19,6 +19,7 @@ working_area 0 0x2000C000 0x4000 nobackup #flash bank str7x <base> <size> 0 0 <target#> <variant> flash bank str7x 0x40000000 0x00040000 0 0 0 STR71x +flash bank str7x 0x400C0000 0x00004000 0 0 0 STR71x # For more information about the configuration files, take a look at: # http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger diff --git a/src/target/target/str912.cfg b/src/target/target/str912.cfg index c749cd2..e827cdf 100644 --- a/src/target/target/str912.cfg +++ b/src/target/target/str912.cfg @@ -19,8 +19,9 @@ target_script 0 reset event/str912_reset.script working_area 0 0x50000000 16384 nobackup -#flash bank str7x <base> <size> 0 0 <target#> <variant> +#flash bank str9x <base> <size> 0 0 <target#> <variant> flash bank str9x 0x00000000 0x00080000 0 0 0 +flash bank str9x 0x00080000 0x00008000 0 0 0 # For more information about the configuration files, take a look at: # http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger |