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author | Tim Newsome <tim@sifive.com> | 2020-05-06 08:42:38 -0700 |
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committer | GitHub <noreply@github.com> | 2020-05-06 08:42:38 -0700 |
commit | 55dd7e83cad26716b04037309bbde3476de43f4d (patch) | |
tree | 3531a4c8f8f727c1d92f5f3271c6bc91139fa278 | |
parent | e6e281197f9deff68b75d47047a726021d871821 (diff) | |
download | riscv-openocd-55dd7e83cad26716b04037309bbde3476de43f4d.zip riscv-openocd-55dd7e83cad26716b04037309bbde3476de43f4d.tar.gz riscv-openocd-55dd7e83cad26716b04037309bbde3476de43f4d.tar.bz2 |
Add awareness of halt group cause. (#472)
Change-Id: I7f7b967ccaa3d1ff05a7e7d0c2a7ba4fa7d68ac0
-rw-r--r-- | src/target/riscv/riscv-013.c | 3 | ||||
-rw-r--r-- | src/target/riscv/riscv.c | 1 | ||||
-rw-r--r-- | src/target/riscv/riscv.h | 1 |
3 files changed, 5 insertions, 0 deletions
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 987df95..22a2a85 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -92,6 +92,7 @@ static int riscv013_test_compliance(struct target *target); #define CSR_DCSR_CAUSE_DEBUGINT 3 #define CSR_DCSR_CAUSE_STEP 4 #define CSR_DCSR_CAUSE_HALT 5 +#define CSR_DCSR_CAUSE_GROUP 6 #define RISCV013_INFO(r) riscv013_info_t *r = get_info(target) @@ -3878,6 +3879,8 @@ static enum riscv_halt_reason riscv013_halt_reason(struct target *target) case CSR_DCSR_CAUSE_DEBUGINT: case CSR_DCSR_CAUSE_HALT: return RISCV_HALT_INTERRUPT; + case CSR_DCSR_CAUSE_GROUP: + return RISCV_HALT_GROUP; } LOG_ERROR("Unknown DCSR cause field: %x", (int)get_field(dcsr, CSR_DCSR_CAUSE)); diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 1345078..68ff2a4 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -1931,6 +1931,7 @@ int set_debug_reason(struct target *target, int hartid) target->debug_reason = DBG_REASON_WATCHPOINT; break; case RISCV_HALT_INTERRUPT: + case RISCV_HALT_GROUP: target->debug_reason = DBG_REASON_DBGRQ; break; case RISCV_HALT_SINGLESTEP: diff --git a/src/target/riscv/riscv.h b/src/target/riscv/riscv.h index 57db8ca..e3bd635 100644 --- a/src/target/riscv/riscv.h +++ b/src/target/riscv/riscv.h @@ -40,6 +40,7 @@ enum riscv_halt_reason { RISCV_HALT_SINGLESTEP, RISCV_HALT_TRIGGER, RISCV_HALT_UNKNOWN, + RISCV_HALT_GROUP, RISCV_HALT_ERROR }; |