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author | David Brownell <dbrownell@users.sourceforge.net> | 2009-11-13 13:44:50 -0800 |
---|---|---|
committer | David Brownell <dbrownell@users.sourceforge.net> | 2009-11-13 13:44:50 -0800 |
commit | 38e8d60f79fd51424c556e07653713254c2d9b4e (patch) | |
tree | ec0b8cea908e83bd369f59024e96e0c73d0469a2 | |
parent | afe0298399bd06700926822e6d49c5bc44151956 (diff) | |
download | riscv-openocd-38e8d60f79fd51424c556e07653713254c2d9b4e.zip riscv-openocd-38e8d60f79fd51424c556e07653713254c2d9b4e.tar.gz riscv-openocd-38e8d60f79fd51424c556e07653713254c2d9b4e.tar.bz2 |
target.cfg: label ETBs correctly
Various cores with an ETB have its TAP misnamed ... either as a
boundary scan TAP or as the iMX "Secure JTAG Controller" (which
is, among other things, a JRC that could be used to shorten
scan chains).
Use the correct name for these TAPs, which we can recognize since
their IDs were assigned by ARM and these chips all document the
presence of an ETB. The 0x2b900f0f is ETB11; the 0x1b900f0f
is an older module, just called "ETB".
Also shrink the ETB's IR configuration; the default IR-Capture
value is fine, and the mask can specify that all four bits are
safe to check (per ARM documentation).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
-rw-r--r-- | tcl/target/imx25.cfg | 8 | ||||
-rw-r--r-- | tcl/target/imx27.cfg | 10 | ||||
-rw-r--r-- | tcl/target/imx31.cfg | 14 | ||||
-rw-r--r-- | tcl/target/imx35.cfg | 12 | ||||
-rw-r--r-- | tcl/target/samsung_s3c6410.cfg | 10 |
5 files changed, 26 insertions, 28 deletions
diff --git a/tcl/target/imx25.cfg b/tcl/target/imx25.cfg index 8f8fa05..6474a85 100644 --- a/tcl/target/imx25.cfg +++ b/tcl/target/imx25.cfg @@ -14,12 +14,12 @@ if { [info exists ENDIAN] } { set _ENDIAN little } -if { [info exists SJCTAPID ] } { - set _SJCTAPID $SJCTAPID +if { [info exists ETBTAPID ] } { + set _ETBTAPID $ETBTAPID } else { - set _SJCTAPID 0x1b900f0f + set _ETBTAPID 0x1b900f0f } -jtag newtap $_CHIPNAME sjc -irlen 4 -expected-id $_SJCTAPID +jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0x0f -expected-id $_ETBTAPID if { [info exists CPUTAPID ] } { set _CPUTAPID $CPUTAPID diff --git a/tcl/target/imx27.cfg b/tcl/target/imx27.cfg index 4a93a67..039e83c 100644 --- a/tcl/target/imx27.cfg +++ b/tcl/target/imx27.cfg @@ -21,13 +21,13 @@ if { [info exists ENDIAN] } { # Note above there are 2 taps -# The bs tap -if { [info exists BSTAPID ] } { - set _BSTAPID $BSTAPID +# trace buffer +if { [info exists ETBTAPID ] } { + set _ETBTAPID $ETBTAPID } else { - set _BSTAPID 0x1b900f0f + set _ETBTAPID 0x1b900f0f } -jtag newtap $_CHIPNAME bs -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_BSTAPID +jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETBTAPID # The CPU tap if { [info exists CPUTAPID ] } { diff --git a/tcl/target/imx31.cfg b/tcl/target/imx31.cfg index 61a2925..9a2aed3 100644 --- a/tcl/target/imx31.cfg +++ b/tcl/target/imx31.cfg @@ -27,15 +27,15 @@ if { [info exists SDMATAPID ] } { set _SDMATAPID 0x2190101d } -#======================================== -# The "system jtag controller" -# IMX31 reference manual, page 6-28 - figure 6-14 -if { [info exists SJCTAPID ] } { - set _SJCTAPID $SJCTAPID +if { [info exists ETBTAPID ] } { + set _ETBTAPID $ETBTAPID } else { - set _SJCTAPID 0x2b900f0f + set _ETBTAPID 0x2b900f0f } -jtag newtap $_CHIPNAME sjc -irlen 4 -ircapture 0x0 -irmask 0x0 -expected-id $_SJCTAPID + +#======================================== + +jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETBTAPID # The "SDMA" - <S>mart <DMA> controller debug tap # Based on some IO pins - this can be disabled & removed diff --git a/tcl/target/imx35.cfg b/tcl/target/imx35.cfg index 32748c5..b899084 100644 --- a/tcl/target/imx35.cfg +++ b/tcl/target/imx35.cfg @@ -27,17 +27,15 @@ if { [info exists SDMATAPID ] } { set _SDMATAPID 0x0882601d } -#======================================== -# The "system jtag controller" -# IMX31 reference manual, page 6-28 - figure 6-14 -if { [info exists SJCTAPID ] } { - set _SJCTAPID $SJCTAPID +if { [info exists ETBTAPID ] } { + set _ETBTAPID $ETBTAPID } else { - set _SJCTAPID 0x2b900f0f + set _ETBTAPID 0x2b900f0f } -jtag newtap $_CHIPNAME sjc -irlen 4 -ircapture 0x0 -irmask 0x0 -expected-id $_SJCTAPID +#======================================== +jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETBTAPID jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID # No IDCODE for this TAP diff --git a/tcl/target/samsung_s3c6410.cfg b/tcl/target/samsung_s3c6410.cfg index 594d321..e451fd6 100644 --- a/tcl/target/samsung_s3c6410.cfg +++ b/tcl/target/samsung_s3c6410.cfg @@ -19,11 +19,12 @@ if { [info exists ENDIAN] } { set _ENDIAN little } -if { [info exists BSTAPID ] } { - set _BSTAPID $BSTAPID +# trace buffer +if { [info exists ETBTAPID ] } { + set _ETBTAPID $ETBTAPID } else { # force an error till we get a good number - set _BSTAPID 0x2b900f0f + set _ETBTAPID 0x2b900f0f } if { [info exists CPUTAPID ] } { @@ -35,8 +36,7 @@ if { [info exists CPUTAPID ] } { #jtag scan chain -# I think the "unknown" is the boundry scan tap -jtag newtap $_CHIPNAME unknown -irlen 4 -ircapture 0x1 -irmask 0xe -expected-id $_BSTAPID +jtag newtap $_CHIPNAME etb -irlen 4 -expected-id $_ETBTAPID jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID set _TARGETNAME $_CHIPNAME.cpu |