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author | Marek Vasut <marek.vasut@gmail.com> | 2018-04-11 17:15:01 +0200 |
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committer | Matthias Welwarsky <matthias@welwarsky.de> | 2018-04-18 13:38:35 +0100 |
commit | 3737dd69e73816d186ba418d7b833462a8041079 (patch) | |
tree | 436e11d21d2950185869649de1f11289258ed7f6 | |
parent | 3a28c8c4bab1e51b9ff2acd3ca590e61bbfb807c (diff) | |
download | riscv-openocd-3737dd69e73816d186ba418d7b833462a8041079.zip riscv-openocd-3737dd69e73816d186ba418d7b833462a8041079.tar.gz riscv-openocd-3737dd69e73816d186ba418d7b833462a8041079.tar.bz2 |
tcl/target: Add Renesas R-Car R8A7790 H2 target
Add configuration for the Renesas R-Car R8A7790 H2 target.
This is an SoC with four Cortex A15 and four Cortex A7
ARMv7a cores, only the four A15 cores are supported.
Change-Id: I6099b257cc0f04e6858ed5f5f8c8d8ad82ef7650
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/4490
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
-rw-r--r-- | tcl/target/renesas_r8a7790.cfg | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/tcl/target/renesas_r8a7790.cfg b/tcl/target/renesas_r8a7790.cfg new file mode 100644 index 0000000..a662b6b --- /dev/null +++ b/tcl/target/renesas_r8a7790.cfg @@ -0,0 +1,36 @@ +# Renesas R-Car H2 +# https://www.renesas.com/en-us/solutions/automotive/products/rcar-h2.html + +if { [info exists DAP_TAPID] } { + set _DAP_TAPID $DAP_TAPID +} else { + set _DAP_TAPID 0x4ba00477 +} + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME r8a7790 +} + +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f -expected-id $_DAP_TAPID + +# Configuring only one core using DAP. +# Base addresses of Cortex A15 cores: +# core 0 - 0x800B0000 +# core 1 - 0x800B2000 +# core 2 - 0x800B4000 +# core 3 - 0x800B6000 +# Base addresses of Cortex A7 cores (not supported yet): +# core 0 - 0x800F0000 +# core 1 - 0x800F2000 +# core 2 - 0x800F4000 +# core 3 - 0x800F6000 +set _TARGETNAME $_CHIPNAME.ca15. +dap create ${_CHIPNAME}.dap -chain-position $_CHIPNAME.cpu +target create ${_TARGETNAME}0 cortex_a -dap ${_CHIPNAME}.dap -coreid 0 -dbgbase 0x800B0000 +target create ${_TARGETNAME}1 cortex_a -dap ${_CHIPNAME}.dap -coreid 1 -dbgbase 0x800B2000 -defer-examine +target create ${_TARGETNAME}2 cortex_a -dap ${_CHIPNAME}.dap -coreid 2 -dbgbase 0x800B4000 -defer-examine +target create ${_TARGETNAME}3 cortex_a -dap ${_CHIPNAME}.dap -coreid 3 -dbgbase 0x800B6000 -defer-examine + +targets ${_TARGETNAME}0 |