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| author | Matthias Welwarsky <matthias@welwarsky.de> | 2015-10-13 12:02:58 +0200 |
|---|---|---|
| committer | Andreas Fritiofson <andreas.fritiofson@gmail.com> | 2015-12-29 21:16:54 +0000 |
| commit | 0627bc3b43d4803b648011eee6ee9a27e7d496aa (patch) | |
| tree | 1abf85af1a1a94d149fb965bf8497c783401f65e | |
| parent | b8be5de75d021b5e01a6739fc70c793a6603467c (diff) | |
| download | riscv-openocd-0627bc3b43d4803b648011eee6ee9a27e7d496aa.zip riscv-openocd-0627bc3b43d4803b648011eee6ee9a27e7d496aa.tar.gz riscv-openocd-0627bc3b43d4803b648011eee6ee9a27e7d496aa.tar.bz2 | |
AM335x: allow simultaneous debugging of A8 and M3 cores
This patch fixes the tap order so that it matches the actual jtag
chain when all taps are enabled. It also introduces a variable
DEFAULT_TAPS that can be set outside of this script, e.g. on the
command line, to specify which taps are to be enabled on init.
Lastly, a new debug target "am335x.m3" is added so that the Wakeup-M3
can be selected for debugging.
Change-Id: Iccf177fda8d5e3737b1b2bb8fd1eaa7d3262ed9f
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3013
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
| -rw-r--r-- | tcl/target/am335x.cfg | 57 |
1 files changed, 42 insertions, 15 deletions
diff --git a/tcl/target/am335x.cfg b/tcl/target/am335x.cfg index e20c6f3..ce7cfb6 100644 --- a/tcl/target/am335x.cfg +++ b/tcl/target/am335x.cfg @@ -1,47 +1,74 @@ source [find target/icepick.cfg] if { [info exists CHIPNAME] } { - set _CHIPNAME $CHIPNAME + set _CHIPNAME $CHIPNAME } else { - set _CHIPNAME am335x + set _CHIPNAME am335x } -# -# M3 DAP -# -if { [info exists M3_DAP_TAPID] } { - set _M3_DAP_TAPID $M3_DAP_TAPID +# set the taps to be enabled by default. this can be overridden +# by setting DEFAULT_TAPS in a separate configuration file +# or directly on the command line. +if { [info exists DEFAULT_TAPS] } { + set _DEFAULT_TAPS "$DEFAULT_TAPS" } else { - set _M3_DAP_TAPID 0x4b6b902f + set _DEFAULT_TAPS "$_CHIPNAME.dap" } -jtag newtap $_CHIPNAME m3_dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_M3_DAP_TAPID -disable -jtag configure $_CHIPNAME.m3_dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 11 0" # # Main DAP # if { [info exists DAP_TAPID] } { - set _DAP_TAPID $DAP_TAPID + set _DAP_TAPID $DAP_TAPID } else { - set _DAP_TAPID 0x4b6b902f + set _DAP_TAPID 0x4b6b902f } jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable jtag configure $_CHIPNAME.dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 12 0" # +# M3 DAP +# +if { [info exists M3_DAP_TAPID] } { + set _M3_DAP_TAPID $M3_DAP_TAPID +} else { + set _M3_DAP_TAPID 0x4b6b902f +} +jtag newtap $_CHIPNAME m3_dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_M3_DAP_TAPID -disable +jtag configure $_CHIPNAME.m3_dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 11 0" + +# # ICEpick-D (JTAG route controller) # if { [info exists JRC_TAPID] } { - set _JRC_TAPID $JRC_TAPID + set _JRC_TAPID $JRC_TAPID } else { - set _JRC_TAPID 0x0b94402f + set _JRC_TAPID 0x0b94402f } jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version -jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap" +jtag configure $_CHIPNAME.jrc -event setup { + global _DEFAULT_TAPS + enable_default_taps $_DEFAULT_TAPS +} # some TCK tycles are required to activate the DEBUG power domain jtag configure $_CHIPNAME.jrc -event post-reset "runtest 100" # +# helper function that enables all taps passed as argument +# +proc enable_default_taps { taps } { + foreach tap $taps { + jtag tapenable $tap + } +} + +# +# Cortex M3 target +# +set _TARGETNAME_2 $_CHIPNAME.m3 +target create $_TARGETNAME_2 cortex_m -chain-position $_CHIPNAME.m3_dap + +# # Cortex A8 target # set _TARGETNAME $_CHIPNAME.cpu |