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authorMatthias Welwarsky <matthias.welwarsky@sysgo.com>2018-04-19 09:56:14 +0200
committerTim Newsome <tim@sifive.com>2018-05-08 15:21:49 -0700
commitef88d58b7c2bcfe64090a15ba226edf1f3ff0466 (patch)
tree178d67c856882dea016cf21fa94cc3c35870a5fb
parent3fb65c4384d8960053fd19b87600e4c64f554374 (diff)
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board: add configuration for stm32f103c8 "Blue Pill"
The "Blue Pill" is a popular development board with an STM32F103C8 micro controller. According to sources, it has a 128kB Flash on board even though the option bytes only report 64kB. This patch therefore also modifies target/stm32f1x.cfg to take an optional FLASH_SIZE variable into account which the board file sets to 0x20000. Change-Id: I8a78ccd2b5faf637c539ee3cf8136789ee15c95d Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4495 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
-rw-r--r--tcl/board/stm32f103c8_blue_pill.cfg14
-rw-r--r--tcl/target/stm32f1x.cfg10
2 files changed, 23 insertions, 1 deletions
diff --git a/tcl/board/stm32f103c8_blue_pill.cfg b/tcl/board/stm32f103c8_blue_pill.cfg
new file mode 100644
index 0000000..2487f35
--- /dev/null
+++ b/tcl/board/stm32f103c8_blue_pill.cfg
@@ -0,0 +1,14 @@
+# STM32F103C8 "Blue Pill"
+
+# NOTE:
+# There is a fair bit of confusion about whether the "Blue Pill" has 128kB or 64kB flash size.
+# The most likely cause is that there exist a -C8 and a -CB variant of the STM32F103, where
+# the C8 has 64kB, the CB has 128kB as per specification. "Blue Pill" boards are manufactured
+# by a lot of different vendors, some may actually use the CB variant but from a cursory look
+# it very hard to tell them apart ("C8" and "CB" look very similar). Nevertheless, people have
+# tried using the full 128kB of flash on the C8 and found it to be working. Hence this board file
+# overrides the internal size detection. Be aware though that you may be using you particular
+# board outside of its specification. If in doubt, comment the following line.
+set FLASH_SIZE 0x20000
+
+source [find target/stm32f1x.cfg]
diff --git a/tcl/target/stm32f1x.cfg b/tcl/target/stm32f1x.cfg
index e0f6ede..471878d 100644
--- a/tcl/target/stm32f1x.cfg
+++ b/tcl/target/stm32f1x.cfg
@@ -22,6 +22,14 @@ if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE 0x1000
}
+# Allow overriding the Flash bank size
+if { [info exists FLASH_SIZE] } {
+ set _FLASH_SIZE $FLASH_SIZE
+} else {
+ # autodetect size
+ set _FLASH_SIZE 0
+}
+
#jtag scan chain
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
@@ -49,7 +57,7 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
# flash size will be probed
set _FLASHNAME $_CHIPNAME.flash
-flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
+flash bank $_FLASHNAME stm32f1x 0x08000000 $_FLASH_SIZE 0 0 $_TARGETNAME
# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
adapter_khz 1000