diff options
| author | Palmer Dabbelt <palmer@dabbelt.com> | 2017-04-26 15:09:24 -0700 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@dabbelt.com> | 2017-04-26 15:09:24 -0700 |
| commit | 9d4df3420c51e75bcc1d6162fc9cc680d6fd2481 (patch) | |
| tree | e4b25e5d98c241055927a85a4827941f1b726410 | |
| parent | da66be0161361a98ebb26bc961b0d01d20b53359 (diff) | |
| download | riscv-openocd-9d4df3420c51e75bcc1d6162fc9cc680d6fd2481.zip riscv-openocd-9d4df3420c51e75bcc1d6162fc9cc680d6fd2481.tar.gz riscv-openocd-9d4df3420c51e75bcc1d6162fc9cc680d6fd2481.tar.bz2 | |
Initialize all registers in examine
I'm not sure why this is necessary, but for some reason GDB is asking
for registers before OpenOCD thinks there's been a halt. This is really
just a workaround, but I need to refactor the v0.11 stuff anyway so I
don't want to figure it out.
| -rw-r--r-- | src/target/riscv/riscv-011.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/target/riscv/riscv-011.c b/src/target/riscv/riscv-011.c index 10612e2..8663082 100644 --- a/src/target/riscv/riscv-011.c +++ b/src/target/riscv/riscv-011.c @@ -1910,6 +1910,9 @@ static int examine(struct target *target) } target_set_examined(target); + riscv_set_current_hartid(target, 0); + for (size_t i = 0; i < 32; ++i) + reg_cache_set(target, i, -1); LOG_INFO("Examined RISCV core; XLEN=%d, misa=0x%" PRIx64, riscv_xlen(target), info->misa); return ERROR_OK; |