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author | Palmer Dabbelt <palmer@dabbelt.com> | 2017-05-15 13:39:24 -0700 |
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committer | Palmer Dabbelt <palmer@dabbelt.com> | 2017-05-15 13:39:58 -0700 |
commit | 8252b9d36cd327a06c3a096ee1175a891d71eb11 (patch) | |
tree | 64a688aed5b76cb54d053fd31aa0495f4f571319 | |
parent | af6e04d5c05d6d9e36b87f90053a65a5c040469d (diff) | |
download | riscv-openocd-8252b9d36cd327a06c3a096ee1175a891d71eb11.zip riscv-openocd-8252b9d36cd327a06c3a096ee1175a891d71eb11.tar.gz riscv-openocd-8252b9d36cd327a06c3a096ee1175a891d71eb11.tar.bz2 |
Build fixes
-rw-r--r-- | src/target/riscv/riscv-013.c | 3 | ||||
-rw-r--r-- | src/target/riscv/riscv.h | 3 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index d3c2fd7..8aeaab6 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -1853,8 +1853,6 @@ int riscv013_dmi_write_u64_bits(struct target *target) void riscv013_reset_current_hart(struct target *target) { - RISCV_INFO(r); - select_dmi(target); uint32_t control = dmi_read(target, DMI_DMCONTROL); control = set_field(control, DMI_DMCONTROL_NDMRESET, 1); @@ -1868,7 +1866,6 @@ void riscv013_reset_current_hart(struct target *target) control = set_field(control, DMI_DMCONTROL_HALTREQ, 0); dmi_write(target, DMI_DMCONTROL, control); - } /* Helper Functions. */ diff --git a/src/target/riscv/riscv.h b/src/target/riscv/riscv.h index 877cc3e..a51456f 100644 --- a/src/target/riscv/riscv.h +++ b/src/target/riscv/riscv.h @@ -127,6 +127,9 @@ int riscv_openocd_step( int handle_breakpoints ); +int riscv_openocd_assert_reset(struct target *target); +int riscv_openocd_deassert_reset(struct target *target); + /*** RISC-V Interface ***/ /* Initializes the shared RISC-V structure. */ |