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| author | Megan Wachs <megan@sifive.com> | 2017-05-05 09:30:24 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2017-05-05 09:30:24 -0700 |
| commit | 325f17f6ec897e3eb4c2cb3ee620dcc74b49c9f3 (patch) | |
| tree | 7f756c4db23e811466cd27eead50212e1abf53d0 | |
| parent | ba3a56937bc921a72b672d666a60ea4292cff449 (diff) | |
| parent | 95a2eb157ab0f1569faf17ecb666b99532755136 (diff) | |
| download | riscv-openocd-325f17f6ec897e3eb4c2cb3ee620dcc74b49c9f3.zip riscv-openocd-325f17f6ec897e3eb4c2cb3ee620dcc74b49c9f3.tar.gz riscv-openocd-325f17f6ec897e3eb4c2cb3ee620dcc74b49c9f3.tar.bz2 | |
Merge pull request #43 from riscv/read-from-0
Read from 0
| -rw-r--r-- | src/target/riscv/riscv-013.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 179c523..1d526df 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -1223,7 +1223,7 @@ static int read_memory(struct target *target, uint32_t address, { RISCV013_INFO(info); - LOG_DEBUG("writing %d words of %d bytes to 0x%08lx", count, size, (long)address); + LOG_DEBUG("reading %d words of %d bytes from 0x%08lx", count, size, (long)address); select_dmi(target); riscv_set_current_hartid(target, 0); @@ -1265,9 +1265,9 @@ static int read_memory(struct target *target, uint32_t address, * program execution mechanism. */ switch (riscv_xlen(target)) { case 64: - riscv_program_write_ram(&program, r_addr + 4, ((riscv_addr_t)(address - size)) >> 32); + riscv_program_write_ram(&program, r_addr + 4, (((riscv_addr_t) address) - size) >> 32); case 32: - riscv_program_write_ram(&program, r_addr, (riscv_addr_t)(address - size)); + riscv_program_write_ram(&program, r_addr, ((riscv_addr_t) address) - size); break; default: LOG_ERROR("unknown XLEN %d", riscv_xlen(target)); @@ -1318,7 +1318,7 @@ static int read_memory(struct target *target, uint32_t address, * the data was all copied. */ riscv_addr_t cur_addr = 0xbadbeef; riscv_addr_t fin_addr = address + (count * size); - riscv_addr_t prev_addr = 0; + riscv_addr_t prev_addr = ((riscv_addr_t) address) - size; LOG_DEBUG("writing until final address 0x%016lx", fin_addr); while (count > 1 && (cur_addr = riscv_read_debug_buffer_x(target, d_addr)) < fin_addr) { LOG_DEBUG("transferring burst starting at address 0x%016lx (previous burst was 0x%016lx)", cur_addr, prev_addr); |