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author | Tim Newsome <tim@sifive.com> | 2023-02-10 11:45:54 -0800 |
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committer | GitHub <noreply@github.com> | 2023-02-10 11:45:54 -0800 |
commit | 282ac9884ee777831e9a8ecf1817e9d2056d25b1 (patch) | |
tree | e877ad56bdad4c2dadf7712a86123fe34716fe8a | |
parent | 9c3a4b458cbe88b4deff81452150e6c163e2e6e5 (diff) | |
parent | 5845f3b71c09bb1a16bd6fec18e876708aaf02d6 (diff) | |
download | riscv-openocd-282ac9884ee777831e9a8ecf1817e9d2056d25b1.zip riscv-openocd-282ac9884ee777831e9a8ecf1817e9d2056d25b1.tar.gz riscv-openocd-282ac9884ee777831e9a8ecf1817e9d2056d25b1.tar.bz2 |
Merge pull request #798 from aap-sc/aap-sc/mcounteren_fixup
CSR_MCOUNTEREN should not exist if U-mode is not supported
-rw-r--r-- | src/target/riscv/riscv.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 3787041..d198010 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -5193,6 +5193,9 @@ int riscv_init_registers(struct target *target) case CSR_VLENB: r->exist = (info->vlenb > 0); break; + case CSR_MCOUNTEREN: + r->exist = riscv_supports_extension(target, 'U'); + break; } if (!r->exist && !list_empty(&info->expose_csr)) { |