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authorTim Newsome <tim@sifive.com>2017-12-29 13:11:27 -0800
committerTim Newsome <tim@sifive.com>2017-12-29 13:11:27 -0800
commit1ddbe7044309f2c8642d290e489fa7ddf6a670ef (patch)
treefd3669ec176538768fa8f680deb5ebffac2f9752
parentab5a98663ea50439ab4a6e40adfe0899cf95828f (diff)
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Remove board files that I shouldn't have added
There are 3 other ones for the SiFive target. Change-Id: I987331a82186a3738096cc390c91889118bf9ac2
-rw-r--r--tcl/board/sifive-coreplexip-e31-arty.cfg31
-rw-r--r--tcl/board/sifive-coreplexip-e51-arty.cfg31
-rw-r--r--tcl/board/sifive-freedom-e300-hifive1.cfg34
3 files changed, 0 insertions, 96 deletions
diff --git a/tcl/board/sifive-coreplexip-e31-arty.cfg b/tcl/board/sifive-coreplexip-e31-arty.cfg
deleted file mode 100644
index 8b382dc..0000000
--- a/tcl/board/sifive-coreplexip-e31-arty.cfg
+++ /dev/null
@@ -1,31 +0,0 @@
-# JTAG adapter setup
-adapter_khz 10000
-
-interface ftdi
-ftdi_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H"
-ftdi_vid_pid 0x15ba 0x002a
-
-ftdi_layout_init 0x0808 0x0a1b
-ftdi_layout_signal nSRST -oe 0x0200
-#ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100
-ftdi_layout_signal LED -data 0x0800
-
-set _CHIPNAME riscv
-jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000001
-
-set _TARGETNAME $_CHIPNAME.cpu
-
-target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME
-$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
-
-# Un-comment these two flash lines if you have a SPI flash and want to write
-# it.
-flash bank spi0 fespi 0x40000000 0 0 0 $_TARGETNAME.0 0x20004000
-init
-if {[ info exists pulse_srst]} {
- ftdi_set_signal nSRST 0
- ftdi_set_signal nSRST z
-}
-halt
-flash protect 0 64 last off
-echo "Ready for Remote Connections"
diff --git a/tcl/board/sifive-coreplexip-e51-arty.cfg b/tcl/board/sifive-coreplexip-e51-arty.cfg
deleted file mode 100644
index 8b382dc..0000000
--- a/tcl/board/sifive-coreplexip-e51-arty.cfg
+++ /dev/null
@@ -1,31 +0,0 @@
-# JTAG adapter setup
-adapter_khz 10000
-
-interface ftdi
-ftdi_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H"
-ftdi_vid_pid 0x15ba 0x002a
-
-ftdi_layout_init 0x0808 0x0a1b
-ftdi_layout_signal nSRST -oe 0x0200
-#ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100
-ftdi_layout_signal LED -data 0x0800
-
-set _CHIPNAME riscv
-jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000001
-
-set _TARGETNAME $_CHIPNAME.cpu
-
-target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME
-$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
-
-# Un-comment these two flash lines if you have a SPI flash and want to write
-# it.
-flash bank spi0 fespi 0x40000000 0 0 0 $_TARGETNAME.0 0x20004000
-init
-if {[ info exists pulse_srst]} {
- ftdi_set_signal nSRST 0
- ftdi_set_signal nSRST z
-}
-halt
-flash protect 0 64 last off
-echo "Ready for Remote Connections"
diff --git a/tcl/board/sifive-freedom-e300-hifive1.cfg b/tcl/board/sifive-freedom-e300-hifive1.cfg
deleted file mode 100644
index b0a8e26..0000000
--- a/tcl/board/sifive-freedom-e300-hifive1.cfg
+++ /dev/null
@@ -1,34 +0,0 @@
-adapter_khz 10000
-
-interface ftdi
-ftdi_device_desc "Dual RS232-HS"
-ftdi_vid_pid 0x0403 0x6010
-
-ftdi_layout_init 0x0008 0x001b
-ftdi_layout_signal nSRST -oe 0x0020 -data 0x0020
-
-#Reset Stretcher logic on FE310 is ~1 second long
-#This doesn't apply if you use
-# ftdi_set_signal, but still good to document
-#adapter_nsrst_delay 1500
-
-set _CHIPNAME riscv
-jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
-
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME riscv -chain-position $_TARGETNAME
-$_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
-
-flash bank onboard_spi_flash fespi 0x20000000 0 0 0 $_TARGETNAME
-init
-#reset -- This type of reset is not implemented yet
-if {[ info exists pulse_srst]} {
- ftdi_set_signal nSRST 0
- ftdi_set_signal nSRST z
- #Wait for the reset stretcher
- #It will work without this, but
- #will incur lots of delays for later commands.
- sleep 1500
-}
-halt
-flash protect 0 64 last off