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author | Tim Newsome <tim@sifive.com> | 2018-01-05 14:07:38 -0800 |
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committer | GitHub <noreply@github.com> | 2018-01-05 14:07:38 -0800 |
commit | 0e3869cbf6c5b0ff517f5ce13b69681fc34c32b5 (patch) | |
tree | 164772e264520a42b2cd2917d55df79bffa7082b | |
parent | 11e51af3b19e3e786693920d001a34603fcce328 (diff) | |
parent | 6f3913cedcc0fc2399937e70f44b45c5fbff25a8 (diff) | |
download | riscv-openocd-0e3869cbf6c5b0ff517f5ce13b69681fc34c32b5.zip riscv-openocd-0e3869cbf6c5b0ff517f5ce13b69681fc34c32b5.tar.gz riscv-openocd-0e3869cbf6c5b0ff517f5ce13b69681fc34c32b5.tar.bz2 |
Merge pull request #179 from riscv/multicore_hart_selection
Select current hart before reading memory.
-rw-r--r-- | src/target/riscv/riscv.c | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 1c0f185..10baac5 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -720,9 +720,19 @@ static int old_or_new_riscv_resume( return riscv_openocd_resume(target, current, address, handle_breakpoints, debug_execution); } +static void riscv_select_current_hart(struct target *target) +{ + RISCV_INFO(r); + if (r->rtos_hartid != -1 && riscv_rtos_enabled(target)) + riscv_set_current_hartid(target, r->rtos_hartid); + else + riscv_set_current_hartid(target, target->coreid); +} + static int riscv_read_memory(struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer) { + riscv_select_current_hart(target); struct target_type *tt = get_target_type(target); return tt->read_memory(target, address, size, count, buffer); } @@ -730,6 +740,7 @@ static int riscv_read_memory(struct target *target, target_addr_t address, static int riscv_write_memory(struct target *target, target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer) { + riscv_select_current_hart(target); struct target_type *tt = get_target_type(target); return tt->write_memory(target, address, size, count, buffer); } @@ -747,10 +758,7 @@ static int riscv_get_gdb_reg_list(struct target *target, return ERROR_FAIL; } - if (r->rtos_hartid != -1 && riscv_rtos_enabled(target)) - riscv_set_current_hartid(target, r->rtos_hartid); - else - riscv_set_current_hartid(target, target->coreid); + riscv_select_current_hart(target); switch (reg_class) { case REG_CLASS_GENERAL: |