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| author | Tim Newsome <tim@sifive.com> | 2017-02-15 17:10:53 -0800 |
|---|---|---|
| committer | Tim Newsome <tim@sifive.com> | 2017-02-15 17:10:53 -0800 |
| commit | 713c001242d7d85c08b66c05ebfad89f6fca96ee (patch) | |
| tree | 78c90c53c0fdb749fcef75db71fff803567d1727 | |
| parent | 79e840aaa759b0438b49eebff1cfc80a39ac35dd (diff) | |
| download | riscv-openocd-713c001242d7d85c08b66c05ebfad89f6fca96ee.zip riscv-openocd-713c001242d7d85c08b66c05ebfad89f6fca96ee.tar.gz riscv-openocd-713c001242d7d85c08b66c05ebfad89f6fca96ee.tar.bz2 | |
Make MemTest32 pass.
Change-Id: I9be90b07be695c976380f9fd50b971f8bb94f513
| -rw-r--r-- | src/target/riscv/riscv-013.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 1744efb..edce7d1 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -2396,8 +2396,8 @@ static int write_memory(struct target *target, uint32_t address, case 4: value = buffer[4*i] | ((uint32_t) buffer[4*i+1] << 8) | - ((uint32_t) buffer[4*i+2] << 8) | - ((uint32_t) buffer[4*i+3] << 8); + ((uint32_t) buffer[4*i+2] << 16) | + ((uint32_t) buffer[4*i+3] << 24); break; default: return ERROR_FAIL; |