diff options
| author | Megan Wachs <megan@sifive.com> | 2017-01-25 11:35:57 -0800 |
|---|---|---|
| committer | Megan Wachs <megan@sifive.com> | 2017-01-25 11:35:57 -0800 |
| commit | 5766efe0c3d02ae13256617bee7f39d76ed2fe41 (patch) | |
| tree | d7ad75cccf0db6209f10e3220e62641ce4e4ad7c | |
| parent | 193f63094891cd3fe6a5032fef2c71d09f063ff4 (diff) | |
| download | riscv-openocd-5766efe0c3d02ae13256617bee7f39d76ed2fe41.zip riscv-openocd-5766efe0c3d02ae13256617bee7f39d76ed2fe41.tar.gz riscv-openocd-5766efe0c3d02ae13256617bee7f39d76ed2fe41.tar.bz2 | |
riscv: Globally disable interrupts when running algorithms.
| -rw-r--r-- | src/target/riscv/riscv.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index e7ca099..0987e66 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -2696,6 +2696,18 @@ static int riscv_run_algorithm(struct target *target, int num_mem_params, } } + + // Disable Interrupts before attempting to run the algorithm. + // Is it possible/desirable to do this in the calling code instead? + uint64_t current_mstatus; + + register_get(&target->reg_cache->reg_list[REG_MSTATUS]); + current_mstatus = info->mstatus_actual; + current_mstatus = current_mstatus & ~((uint64_t) 0x8); + register_set((&target->reg_cache->reg_list[REG_MSTATUS]), (uint8_t*) ¤t_mstatus); + info->mstatus_actual = current_mstatus; + + /// Run algorithm LOG_DEBUG("resume at 0x%x", entry_point); if (riscv_resume(target, 0, entry_point, 0, 0) != ERROR_OK) { |