Prefix RISC-V globals with riscv_.global

Also removed some stuff from riscv.h that was only used in one file
anyway.

Change-Id: Id980fba15448042b18b04e8da8ec48bd2d32fda8

5 files changed, 64 insertions, 70 deletions

diff --git a/src/target/riscv/batch.c b/src/target/riscv/batch.c
index b2c7e83..183c0e7 100644
--- a/src/target/riscv/batch.c
+++ b/src/target/riscv/batch.c
@@ -27,7 +27,7 @@ struct riscv_batch *riscv_batch_alloc(struct target *target, size_t scans, size_
 	out->data_out = malloc(sizeof(*out->data_out) * (scans) * DMI_SCAN_BUF_SIZE);
 	out->data_in  = malloc(sizeof(*out->data_in)  * (scans) * DMI_SCAN_BUF_SIZE);
 	out->fields = malloc(sizeof(*out->fields) * (scans));
-	if (bscan_tunnel_ir_width != 0)
+	if (riscv_bscan_tunnel_ir_width != 0)
 		out->bscan_ctxt = malloc(sizeof(*out->bscan_ctxt) * (scans));
 	out->last_scan = RISCV_SCAN_TYPE_INVALID;
 	out->read_keys = malloc(sizeof(*out->read_keys) * (scans));
@@ -62,7 +62,7 @@ int riscv_batch_run(struct riscv_batch *batch)
 	riscv_batch_add_nop(batch);
 
 	for (size_t i = 0; i < batch->used_scans; ++i) {
-		if (bscan_tunnel_ir_width != 0)
+		if (riscv_bscan_tunnel_ir_width != 0)
 			riscv_add_bscan_tunneled_scan(batch->target, batch->fields+i, batch->bscan_ctxt+i);
 		else
 			jtag_add_dr_scan(batch->target->tap, 1, batch->fields + i, TAP_IDLE);
@@ -76,7 +76,7 @@ int riscv_batch_run(struct riscv_batch *batch)
 		return ERROR_FAIL;
 	}
 
-	if (bscan_tunnel_ir_width != 0) {
+	if (riscv_bscan_tunnel_ir_width != 0) {
 		/* need to right-shift "in" by one bit, because of clock skew between BSCAN TAP and DM TAP */
 		for (size_t i = 0; i < batch->used_scans; ++i)
 			buffer_shr((batch->fields + i)->in_value, DMI_SCAN_BUF_SIZE, 1);
diff --git a/src/target/riscv/riscv-011.c b/src/target/riscv/riscv-011.c
index c49e925..f605343 100644
--- a/src/target/riscv/riscv-011.c
+++ b/src/target/riscv/riscv-011.c
@@ -285,7 +285,7 @@ static uint32_t dtmcontrol_scan(struct target *target, uint32_t out)
 
 	buf_set_u32(out_value, 0, 32, out);
 
-	jtag_add_ir_scan(target->tap, &select_dtmcontrol, TAP_IDLE);
+	jtag_add_ir_scan(target->tap, &riscv_select_dtmcontrol, TAP_IDLE);
 
 	field.num_bits = 32;
 	field.out_value = out_value;
@@ -293,7 +293,7 @@ static uint32_t dtmcontrol_scan(struct target *target, uint32_t out)
 	jtag_add_dr_scan(target->tap, 1, &field, TAP_IDLE);
 
 	/* Always return to dbus. */
-	jtag_add_ir_scan(target->tap, &select_dbus, TAP_IDLE);
+	jtag_add_ir_scan(target->tap, &riscv_select_dbus, TAP_IDLE);
 
 	int retval = jtag_execute_queue();
 	if (retval != ERROR_OK) {
@@ -312,7 +312,7 @@ static uint32_t idcode_scan(struct target *target)
 	struct scan_field field;
 	uint8_t in_value[4];
 
-	jtag_add_ir_scan(target->tap, &select_idcode, TAP_IDLE);
+	jtag_add_ir_scan(target->tap, &riscv_select_idcode, TAP_IDLE);
 
 	field.num_bits = 32;
 	field.out_value = NULL;
@@ -326,7 +326,7 @@ static uint32_t idcode_scan(struct target *target)
 	}
 
 	/* Always return to dbus. */
-	jtag_add_ir_scan(target->tap, &select_dbus, TAP_IDLE);
+	jtag_add_ir_scan(target->tap, &riscv_select_dbus, TAP_IDLE);
 
 	uint32_t in = buf_get_u32(field.in_value, 0, 32);
 	LOG_DEBUG("IDCODE: 0x0 -> 0x%x", in);
@@ -1373,7 +1373,7 @@ static int set_register(struct target *target, int hartid, int regid,
 static int halt(struct target *target)
 {
 	LOG_DEBUG("riscv_halt()");
-	jtag_add_ir_scan(target->tap, &select_dbus, TAP_IDLE);
+	jtag_add_ir_scan(target->tap, &riscv_select_dbus, TAP_IDLE);
 
 	cache_set32(target, 0, csrsi(CSR_DCSR, DCSR_HALT));
 	cache_set32(target, 1, csrr(S0, CSR_MHARTID));
@@ -1422,7 +1422,7 @@ static int strict_step(struct target *target, bool announce)
 static int step(struct target *target, int current, target_addr_t address,
 		int handle_breakpoints)
 {
-	jtag_add_ir_scan(target->tap, &select_dbus, TAP_IDLE);
+	jtag_add_ir_scan(target->tap, &riscv_select_dbus, TAP_IDLE);
 
 	if (!current) {
 		if (riscv_xlen(target) > 32) {
@@ -1876,7 +1876,7 @@ static int handle_halt(struct target *target, bool announce)
 
 static int poll_target(struct target *target, bool announce)
 {
-	jtag_add_ir_scan(target->tap, &select_dbus, TAP_IDLE);
+	jtag_add_ir_scan(target->tap, &riscv_select_dbus, TAP_IDLE);
 
 	/* Inhibit debug logging during poll(), which isn't usually interesting and
 	 * just fills up the screen/logs with clutter. */
@@ -1911,7 +1911,7 @@ static int riscv011_resume(struct target *target, int current,
 		target_addr_t address, int handle_breakpoints, int debug_execution)
 {
 	RISCV_INFO(r);
-	jtag_add_ir_scan(target->tap, &select_dbus, TAP_IDLE);
+	jtag_add_ir_scan(target->tap, &riscv_select_dbus, TAP_IDLE);
 
 	r->prepped = false;
 	return resume(target, debug_execution, false);
@@ -1922,7 +1922,7 @@ static int assert_reset(struct target *target)
 	riscv011_info_t *info = get_info(target);
 	/* TODO: Maybe what I implemented here is more like soft_reset_halt()? */
 
-	jtag_add_ir_scan(target->tap, &select_dbus, TAP_IDLE);
+	jtag_add_ir_scan(target->tap, &riscv_select_dbus, TAP_IDLE);
 
 	/* The only assumption we can make is that the TAP was reset. */
 	if (wait_for_debugint_clear(target, true) != ERROR_OK) {
@@ -1955,7 +1955,7 @@ static int assert_reset(struct target *target)
 
 static int deassert_reset(struct target *target)
 {
-	jtag_add_ir_scan(target->tap, &select_dbus, TAP_IDLE);
+	jtag_add_ir_scan(target->tap, &riscv_select_dbus, TAP_IDLE);
 	if (target->reset_halt)
 		return wait_for_state(target, TARGET_HALTED);
 	else
@@ -1970,7 +1970,7 @@ static int read_memory(struct target *target, target_addr_t address,
 		return ERROR_NOT_IMPLEMENTED;
 	}
 
-	jtag_add_ir_scan(target->tap, &select_dbus, TAP_IDLE);
+	jtag_add_ir_scan(target->tap, &riscv_select_dbus, TAP_IDLE);
 
 	cache_set32(target, 0, lw(S0, ZERO, DEBUG_RAM_START + 16));
 	switch (size) {
@@ -2134,7 +2134,7 @@ static int write_memory(struct target *target, target_addr_t address,
 		uint32_t size, uint32_t count, const uint8_t *buffer)
 {
 	riscv011_info_t *info = get_info(target);
-	jtag_add_ir_scan(target->tap, &select_dbus, TAP_IDLE);
+	jtag_add_ir_scan(target->tap, &riscv_select_dbus, TAP_IDLE);
 
 	/* Set up the address. */
 	cache_set_store(target, 0, T0, SLOT1);
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c
index 6a6507f..a942746 100644
--- a/src/target/riscv/riscv-013.c
+++ b/src/target/riscv/riscv-013.c
@@ -416,11 +416,11 @@ static void dump_field(int idle, const struct scan_field *field)
 
 static void select_dmi(struct target *target)
 {
-	if (bscan_tunnel_ir_width != 0) {
+	if (riscv_bscan_tunnel_ir_width != 0) {
 		select_dmi_via_bscan(target);
 		return;
 	}
-	jtag_add_ir_scan(target->tap, &select_dbus, TAP_IDLE);
+	jtag_add_ir_scan(target->tap, &riscv_select_dbus, TAP_IDLE);
 }
 
 static uint32_t dtmcontrol_scan(struct target *target, uint32_t out)
@@ -429,12 +429,12 @@ static uint32_t dtmcontrol_scan(struct target *target, uint32_t out)
 	uint8_t in_value[4];
 	uint8_t out_value[4] = { 0 };
 
-	if (bscan_tunnel_ir_width != 0)
+	if (riscv_bscan_tunnel_ir_width != 0)
 		return dtmcontrol_scan_via_bscan(target, out);
 
 	buf_set_u32(out_value, 0, 32, out);
 
-	jtag_add_ir_scan(target->tap, &select_dtmcontrol, TAP_IDLE);
+	jtag_add_ir_scan(target->tap, &riscv_select_dtmcontrol, TAP_IDLE);
 
 	field.num_bits = 32;
 	field.out_value = out_value;
@@ -511,7 +511,7 @@ static dmi_status_t dmi_scan(struct target *target, uint32_t *address_in,
 	   the jtag_execute_queue() call.  Heap or static fields in this case doesn't seem
 	   the best fit.  Declaring stack based field values in a subsidiary function call wouldn't
 	   work. */
-	if (bscan_tunnel_ir_width != 0) {
+	if (riscv_bscan_tunnel_ir_width != 0) {
 		riscv_add_bscan_tunneled_scan(target, &field, &bscan_ctxt);
 	} else {
 		/* Assume dbus is already selected. */
@@ -533,7 +533,7 @@ static dmi_status_t dmi_scan(struct target *target, uint32_t *address_in,
 		return DMI_STATUS_FAILED;
 	}
 
-	if (bscan_tunnel_ir_width != 0) {
+	if (riscv_bscan_tunnel_ir_width != 0) {
 		/* need to right-shift "in" by one bit, because of clock skew between BSCAN TAP and DM TAP */
 		buffer_shr(in, num_bytes, 1);
 	}
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c
index f847016..bbdc0ab 100644
--- a/src/target/riscv/riscv.c
+++ b/src/target/riscv/riscv.c
@@ -156,30 +156,34 @@ typedef enum slot {
 #define MAX_HWBPS			16
 #define DRAM_CACHE_SIZE		16
 
-uint8_t ir_dtmcontrol[4] = {DTMCONTROL};
-struct scan_field select_dtmcontrol = {
+uint8_t riscv_ir_dtmcontrol[4] = {DTMCONTROL};
+struct scan_field riscv_select_dtmcontrol = {
 	.in_value = NULL,
-	.out_value = ir_dtmcontrol
+	.out_value = riscv_ir_dtmcontrol
 };
-uint8_t ir_dbus[4] = {DBUS};
-struct scan_field select_dbus = {
+uint8_t riscv_ir_dbus[4] = {DBUS};
+struct scan_field riscv_select_dbus = {
 	.in_value = NULL,
-	.out_value = ir_dbus
+	.out_value = riscv_ir_dbus
 };
-uint8_t ir_idcode[4] = {0x1};
-struct scan_field select_idcode = {
+uint8_t riscv_ir_idcode[4] = {0x1};
+struct scan_field riscv_select_idcode = {
 	.in_value = NULL,
-	.out_value = ir_idcode
+	.out_value = riscv_ir_idcode
 };
 
-bscan_tunnel_type_t bscan_tunnel_type;
-int bscan_tunnel_ir_width; /* if zero, then tunneling is not present/active */
+typedef enum {
+	BSCAN_TUNNEL_NESTED_TAP,
+	BSCAN_TUNNEL_DATA_REGISTER
+} bscan_tunnel_type_t;
+static bscan_tunnel_type_t bscan_tunnel_type;
+int riscv_bscan_tunnel_ir_width; /* if zero, then tunneling is not present/active */
 
 uint8_t bscan_zero[4] = {0};
 uint8_t bscan_one[4] = {1};
 
-uint8_t ir_user4[4];
-struct scan_field select_user4 = {
+static uint8_t ir_user4[4];
+static struct scan_field select_user4 = {
 	.in_value = NULL,
 	.out_value = ir_user4
 };
@@ -194,7 +198,7 @@ struct scan_field _bscan_tunnel_data_register_select_dmi[] = {
 		},
 		{
 			.num_bits = 5, /* initialized in riscv_init_target to ir width of DM */
-			.out_value = ir_dbus,
+			.out_value = riscv_ir_dbus,
 			.in_value = NULL,
 		},
 		{
@@ -222,7 +226,7 @@ struct scan_field _bscan_tunnel_nested_tap_select_dmi[] = {
 		},
 		{
 			.num_bits = 0, /* initialized in riscv_init_target to ir width of DM */
-			.out_value = ir_dbus,
+			.out_value = riscv_ir_dbus,
 			.in_value = NULL,
 		},
 		{
@@ -332,7 +336,7 @@ void select_dmi_via_bscan(struct target *target)
 uint32_t dtmcontrol_scan_via_bscan(struct target *target, uint32_t out)
 {
 	/* On BSCAN TAP: Select IR=USER4, issue tunneled IR scan via BSCAN TAP's DR */
-	uint8_t tunneled_ir_width[4] = {bscan_tunnel_ir_width};
+	uint8_t tunneled_ir_width[4] = {riscv_bscan_tunnel_ir_width};
 	uint8_t tunneled_dr_width[4] = {32};
 	uint8_t out_value[5] = {0};
 	uint8_t in_value[5] = {0};
@@ -345,8 +349,8 @@ uint32_t dtmcontrol_scan_via_bscan(struct target *target, uint32_t out)
 		tunneled_ir[0].num_bits = 3;
 		tunneled_ir[0].out_value = bscan_zero;
 		tunneled_ir[0].in_value = NULL;
-		tunneled_ir[1].num_bits = bscan_tunnel_ir_width;
-		tunneled_ir[1].out_value = ir_dtmcontrol;
+		tunneled_ir[1].num_bits = riscv_bscan_tunnel_ir_width;
+		tunneled_ir[1].out_value = riscv_ir_dtmcontrol;
 		tunneled_ir[1].in_value = NULL;
 		tunneled_ir[2].num_bits = 7;
 		tunneled_ir[2].out_value = tunneled_ir_width;
@@ -372,8 +376,8 @@ uint32_t dtmcontrol_scan_via_bscan(struct target *target, uint32_t out)
 		tunneled_ir[3].num_bits = 3;
 		tunneled_ir[3].out_value = bscan_zero;
 		tunneled_ir[3].in_value = NULL;
-		tunneled_ir[2].num_bits = bscan_tunnel_ir_width;
-		tunneled_ir[2].out_value = ir_dtmcontrol;
+		tunneled_ir[2].num_bits = riscv_bscan_tunnel_ir_width;
+		tunneled_ir[2].out_value = riscv_ir_dtmcontrol;
 		tunneled_ir[1].in_value = NULL;
 		tunneled_ir[1].num_bits = 7;
 		tunneled_ir[1].out_value = tunneled_ir_width;
@@ -421,13 +425,13 @@ static uint32_t dtmcontrol_scan(struct target *target, uint32_t out)
 	uint8_t in_value[4];
 	uint8_t out_value[4] = { 0 };
 
-	if (bscan_tunnel_ir_width != 0)
+	if (riscv_bscan_tunnel_ir_width != 0)
 		return dtmcontrol_scan_via_bscan(target, out);
 
 
 	buf_set_u32(out_value, 0, 32, out);
 
-	jtag_add_ir_scan(target->tap, &select_dtmcontrol, TAP_IDLE);
+	jtag_add_ir_scan(target->tap, &riscv_select_dtmcontrol, TAP_IDLE);
 
 	field.num_bits = 32;
 	field.out_value = out_value;
@@ -435,7 +439,7 @@ static uint32_t dtmcontrol_scan(struct target *target, uint32_t out)
 	jtag_add_dr_scan(target->tap, 1, &field, TAP_IDLE);
 
 	/* Always return to dbus. */
-	jtag_add_ir_scan(target->tap, &select_dbus, TAP_IDLE);
+	jtag_add_ir_scan(target->tap, &riscv_select_dbus, TAP_IDLE);
 
 	int retval = jtag_execute_queue();
 	if (retval != ERROR_OK) {
@@ -480,11 +484,11 @@ static int riscv_init_target(struct command_context *cmd_ctx,
 	riscv_info_init(target, info);
 	info->cmd_ctx = cmd_ctx;
 
-	select_dtmcontrol.num_bits = target->tap->ir_length;
-	select_dbus.num_bits = target->tap->ir_length;
-	select_idcode.num_bits = target->tap->ir_length;
+	riscv_select_dtmcontrol.num_bits = target->tap->ir_length;
+	riscv_select_dbus.num_bits = target->tap->ir_length;
+	riscv_select_idcode.num_bits = target->tap->ir_length;
 
-	if (bscan_tunnel_ir_width != 0) {
+	if (riscv_bscan_tunnel_ir_width != 0) {
 		assert(target->tap->ir_length >= 6);
 		uint32_t ir_user4_raw = 0x23 << (target->tap->ir_length - 6);
 		ir_user4[0] = (uint8_t)ir_user4_raw;
@@ -492,11 +496,11 @@ static int riscv_init_target(struct command_context *cmd_ctx,
 		ir_user4[2] = (uint8_t)(ir_user4_raw >>= 8);
 		ir_user4[3] = (uint8_t)(ir_user4_raw >>= 8);
 		select_user4.num_bits = target->tap->ir_length;
-		bscan_tunneled_ir_width[0] = bscan_tunnel_ir_width;
+		bscan_tunneled_ir_width[0] = riscv_bscan_tunnel_ir_width;
 		if (bscan_tunnel_type == BSCAN_TUNNEL_DATA_REGISTER)
-			bscan_tunnel_data_register_select_dmi[1].num_bits = bscan_tunnel_ir_width;
+			bscan_tunnel_data_register_select_dmi[1].num_bits = riscv_bscan_tunnel_ir_width;
 		else /* BSCAN_TUNNEL_NESTED_TAP */
-			bscan_tunnel_nested_tap_select_dmi[2].num_bits = bscan_tunnel_ir_width;
+			bscan_tunnel_nested_tap_select_dmi[2].num_bits = riscv_bscan_tunnel_ir_width;
 	}
 
 	riscv_semihosting_init(target);
@@ -2568,11 +2572,11 @@ COMMAND_HANDLER(riscv_set_ir)
 	COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value);
 
 	if (!strcmp(CMD_ARGV[0], "idcode"))
-		buf_set_u32(ir_idcode, 0, 32, value);
+		buf_set_u32(riscv_ir_idcode, 0, 32, value);
 	else if (!strcmp(CMD_ARGV[0], "dtmcs"))
-		buf_set_u32(ir_dtmcontrol, 0, 32, value);
+		buf_set_u32(riscv_ir_dtmcontrol, 0, 32, value);
 	else if (!strcmp(CMD_ARGV[0], "dmi"))
-		buf_set_u32(ir_dbus, 0, 32, value);
+		buf_set_u32(riscv_ir_dbus, 0, 32, value);
 	else
 		return ERROR_FAIL;
 
@@ -2620,7 +2624,7 @@ COMMAND_HANDLER(riscv_use_bscan_tunnel)
 		LOG_INFO("Invalid Tunnel type selected ! : selecting default Nested Tap Type");
 
 	bscan_tunnel_type = tunnel_type;
-	bscan_tunnel_ir_width = irwidth;
+	riscv_bscan_tunnel_ir_width = irwidth;
 	return ERROR_OK;
 }
 
diff --git a/src/target/riscv/riscv.h b/src/target/riscv/riscv.h
index 5e171d9..d30e019 100644
--- a/src/target/riscv/riscv.h
+++ b/src/target/riscv/riscv.h
@@ -219,21 +219,11 @@ static inline riscv_info_t *riscv_info(const struct target *target)
 { return target->arch_info; }
 #define RISCV_INFO(R) riscv_info_t *R = riscv_info(target);
 
-extern uint8_t ir_dtmcontrol[4];
-extern struct scan_field select_dtmcontrol;
-extern uint8_t ir_dbus[4];
-extern struct scan_field select_dbus;
-extern uint8_t ir_idcode[4];
-extern struct scan_field select_idcode;
-
-extern struct scan_field select_user4;
-extern struct scan_field *bscan_tunneled_select_dmi;
-extern uint32_t bscan_tunneled_select_dmi_num_fields;
-extern uint8_t bscan_zero[4];
-extern uint8_t bscan_one[4];
-typedef enum { BSCAN_TUNNEL_NESTED_TAP, BSCAN_TUNNEL_DATA_REGISTER } bscan_tunnel_type_t;
-extern int bscan_tunnel_ir_width;
-extern bscan_tunnel_type_t bscan_tunnel_type;
+extern struct scan_field riscv_select_dtmcontrol;
+extern struct scan_field riscv_select_dbus;
+extern struct scan_field riscv_select_idcode;
+
+extern int riscv_bscan_tunnel_ir_width;
 
 uint32_t dtmcontrol_scan_via_bscan(struct target *target, uint32_t out);
 void select_dmi_via_bscan(struct target *target);