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authorTim Newsome <tim@sifive.com>2017-07-06 14:33:28 -0700
committerTim Newsome <tim@sifive.com>2017-07-06 14:53:28 -0700
commit21e06e1d89cac1a946876caf28bb5ea2dbea353c (patch)
treee1143cc4c658f6ffce428612511502ea1bb45304
parent708b05ba0765de42cc7eaf8ce56fcc67109af637 (diff)
downloadriscv-openocd-build32.zip
riscv-openocd-build32.tar.gz
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Fix 32-bit build.build32
Code taken from http://openocd.zylin.com/#/c/4178/
-rw-r--r--src/target/mips32_pracc.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/target/mips32_pracc.h b/src/target/mips32_pracc.h
index b8b93c6..888c847 100644
--- a/src/target/mips32_pracc.h
+++ b/src/target/mips32_pracc.h
@@ -114,7 +114,7 @@ int mips32_cp0_read(struct mips_ejtag *ejtag_info,
int mips32_cp0_write(struct mips_ejtag *ejtag_info,
uint32_t val, uint32_t cp0_reg, uint32_t cp0_sel);
-inline void pracc_swap16_array(struct mips_ejtag *ejtag_info, uint32_t *buf, int count)
+static inline void pracc_swap16_array(struct mips_ejtag *ejtag_info, uint32_t *buf, int count)
{
if (ejtag_info->isa && ejtag_info->endianness)
for (int i = 0; i != count; i++)