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| author | Eric Gouriou <ego@rivosinc.com> | 2023-05-01 21:57:16 -0700 |
|---|---|---|
| committer | Eric Gouriou <ego@rivosinc.com> | 2023-05-01 21:57:16 -0700 |
| commit | 199e646f2a8e36533c92280a5fba0d259ba7fbfb (patch) | |
| tree | cb37a856a49ecb27592a0e6e2d8f23155627436e /unratified/rv_zvknhb | |
| parent | bb64568616b364e7103910f5dd363bc9cad1bb0a (diff) | |
| download | riscv-opcodes-199e646f2a8e36533c92280a5fba0d259ba7fbfb.zip riscv-opcodes-199e646f2a8e36533c92280a5fba0d259ba7fbfb.tar.gz riscv-opcodes-199e646f2a8e36533c92280a5fba0d259ba7fbfb.tar.bz2 | |
Support for Zvk, Vector Cryptography Extensions
Add encodings for all instructions in the Zvk extensions:
- Zvbb, Vector Bit-manipulation instructions used in Cryptography,
- Zvbc, Vector Carryless Multiplication
- Zvkg, Vector GCM/GMAC instruction for Cryptography,
- Zvkned, NIST Suite: Vector AES Encryption & Decryption (Single
Round),
- Zvknha, Zvknhb, NIST Suite: Vector SHA-2,
- Zvksed, ShangMi Suite: SM4 Block Cipher Instructions
- Zvkssh, ShangMi Suite: SM3 Hash Function Instructions
Add two "shorthand" extensions:
- Zvkn: NIST Suite, imports Zvbb, Zvbc, Zvkned, and Zvknh
- Zvks: ShangMi Suite, imports Zvbb, Zvbc, Zvksed, and Zvksh
Three new fields are listed in constants.py:
- 'zimm5', used to encode round constants (Zvkns, Zvksed, Zvksh),
and 5-bit shift constant (vwsll.vi in Zvbb)
- 'zimm6hi, zimm6lo', used to encode the 6 bits rotate amount
in vror.vi.
The Zvk instructions – with the exception of Zvbb, Zvbc – reside in the
P opcode space. Some encodings conflict with proposed instructions
in the P extension (packed SIMD). Zvk and P are exclusive of each
other, no implementation will implement both. Conflicting P instructions
are marked as pseudo of the Zvk instructions.
The encodings match the current documentation of the specification
at <https://github.com/riscv/riscv-crypto/tree/master/doc/vector>,
at Version v0.9.1, 25 April, 2023 (Freeze Candidate).
Co-authored-by: Eric Gouriou <ego@rivosinc.com>
Co-authored-by: Stanislaw Kardach <kda@semihalf.com>
Co-authored-by: Kornel Duleba <mindal@semihalf.com>
Co-authored-by: Raghav Gupta <rgupta@rivosinc.com>
Signed-off-by: Eric Gouriou <ego@rivosinc.com>
Diffstat (limited to 'unratified/rv_zvknhb')
| -rw-r--r-- | unratified/rv_zvknhb | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/unratified/rv_zvknhb b/unratified/rv_zvknhb new file mode 100644 index 0000000..c0b0d8f --- /dev/null +++ b/unratified/rv_zvknhb @@ -0,0 +1,9 @@ +# Zvknhb - Vector Crypto SHA-256 and SHA-512 Secure Hash +# +# The following 3 instructions are defined in both Zvknha and Zvknhb: +# - in Zvknha, they support SHA-256 (SEW=32) only, +# - in Zvknhb, they support both SHA-256 (SEW=32) and SHA-512 (SEW=64). + +$import rv_zvknha::vsha2ms.vv +$import rv_zvknha::vsha2ch.vv +$import rv_zvknha::vsha2cl.vv |