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author | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-03-17 01:20:05 -0700 |
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committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-03-17 01:20:05 -0700 |
commit | 2f97f1163e66d69a2a9c18f9c31aa2fe9cff33f0 (patch) | |
tree | 9feeb7548c74c8e68151202c7e798f6c627ce6a4 /parse-opcodes | |
parent | 13340aae19c8982c0b638702aeafdb5115737516 (diff) | |
download | riscv-opcodes-2f97f1163e66d69a2a9c18f9c31aa2fe9cff33f0.zip riscv-opcodes-2f97f1163e66d69a2a9c18f9c31aa2fe9cff33f0.tar.gz riscv-opcodes-2f97f1163e66d69a2a9c18f9c31aa2fe9cff33f0.tar.bz2 |
Merge [shm]call into ecall, [shm]ret into eret
Diffstat (limited to 'parse-opcodes')
-rwxr-xr-x | parse-opcodes | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/parse-opcodes b/parse-opcodes index 72bc44a..d7d2602 100755 --- a/parse-opcodes +++ b/parse-opcodes @@ -45,14 +45,12 @@ causes = [ (0x00, 'misaligned fetch'), (0x01, 'fault fetch'), (0x02, 'illegal instruction'), - (0x04, 'scall'), - (0x05, 'hcall'), - (0x06, 'mcall'), - (0x07, 'breakpoint'), - (0x08, 'misaligned load'), - (0x09, 'fault load'), - (0x0A, 'misaligned store'), - (0x0B, 'fault store'), + (0x04, 'misaligned load'), + (0x05, 'fault load'), + (0x06, 'misaligned store'), + (0x07, 'fault store'), + (0x08, 'ecall'), + (0x09, 'breakpoint'), ] csrs = [ |