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| author | Andrew Waterman <andrew@sifive.com> | 2019-06-11 17:04:56 +0200 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2019-06-11 17:04:56 +0200 |
| commit | 0c06e7381689977480fd9ec6a1711f8eb48c6382 (patch) | |
| tree | 4352da7dfdf0c2df934e68fb49f30a183ddca6a3 /opcodes-rvv | |
| parent | a2bf04f1fa574e5d8045bf557550027e55d14d1a (diff) | |
| download | riscv-opcodes-0c06e7381689977480fd9ec6a1711f8eb48c6382.zip riscv-opcodes-0c06e7381689977480fd9ec6a1711f8eb48c6382.tar.gz riscv-opcodes-0c06e7381689977480fd9ec6a1711f8eb48c6382.tar.bz2 | |
Expand vfunary0 and vfunary1 opcodes into sub-instructions
Diffstat (limited to 'opcodes-rvv')
| -rw-r--r-- | opcodes-rvv | 22 |
1 files changed, 20 insertions, 2 deletions
diff --git a/opcodes-rvv b/opcodes-rvv index 8b2a8c0..8e7ea8d 100644 --- a/opcodes-rvv +++ b/opcodes-rvv @@ -137,8 +137,6 @@ vflt.vv 31..26=0x1b vm vs2 vs1 14..12=0x1 vd 6..0=0x57 vfne.vv 31..26=0x1c vm vs2 vs1 14..12=0x1 vd 6..0=0x57 vfdiv.vv 31..26=0x20 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 -vfunary0.vv 31..26=0x22 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 -vfunary1.vv 31..26=0x23 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 vfmul.vv 31..26=0x24 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 vfmadd.vv 31..26=0x28 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 vfnmadd.vv 31..26=0x29 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 @@ -149,6 +147,26 @@ vfnmacc.vv 31..26=0x2d vm vs2 vs1 14..12=0x1 vd 6..0=0x57 vfmsac.vv 31..26=0x2e vm vs2 vs1 14..12=0x1 vd 6..0=0x57 vfnmsac.vv 31..26=0x2f vm vs2 vs1 14..12=0x1 vd 6..0=0x57 +vfcvt.xu.f.v 31..26=0x22 vm vs2 19..15=0x00 14..12=0x1 vd 6..0=0x57 +vfcvt.x.f.v 31..26=0x22 vm vs2 19..15=0x01 14..12=0x1 vd 6..0=0x57 +vfcvt.f.xu.v 31..26=0x22 vm vs2 19..15=0x02 14..12=0x1 vd 6..0=0x57 +vfcvt.f.x.v 31..26=0x22 vm vs2 19..15=0x03 14..12=0x1 vd 6..0=0x57 + +vfwcvt.xu.f.v 31..26=0x22 vm vs2 19..15=0x08 14..12=0x1 vd 6..0=0x57 +vfwcvt.x.f.v 31..26=0x22 vm vs2 19..15=0x09 14..12=0x1 vd 6..0=0x57 +vfwcvt.f.xu.v 31..26=0x22 vm vs2 19..15=0x0A 14..12=0x1 vd 6..0=0x57 +vfwcvt.f.x.v 31..26=0x22 vm vs2 19..15=0x0B 14..12=0x1 vd 6..0=0x57 +vfwcvt.f.f.v 31..26=0x22 vm vs2 19..15=0x0C 14..12=0x1 vd 6..0=0x57 + +vfncvt.xu.f.v 31..26=0x22 vm vs2 19..15=0x10 14..12=0x1 vd 6..0=0x57 +vfncvt.x.f.v 31..26=0x22 vm vs2 19..15=0x11 14..12=0x1 vd 6..0=0x57 +vfncvt.f.xu.v 31..26=0x22 vm vs2 19..15=0x12 14..12=0x1 vd 6..0=0x57 +vfncvt.f.x.v 31..26=0x22 vm vs2 19..15=0x13 14..12=0x1 vd 6..0=0x57 +vfncvt.f.f.v 31..26=0x22 vm vs2 19..15=0x14 14..12=0x1 vd 6..0=0x57 + +vfsqrt.v 31..26=0x23 vm vs2 19..15=0x00 14..12=0x1 vd 6..0=0x57 +vfclass.v 31..26=0x23 vm vs2 19..15=0x01 14..12=0x1 vd 6..0=0x57 + vfwadd.vv 31..26=0x30 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 vfwredsum.vs 31..26=0x31 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 vfwsub.vv 31..26=0x32 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 |