diff options
| author | Andrew Waterman <andrew@sifive.com> | 2020-03-03 18:09:58 -0800 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2020-03-03 18:09:58 -0800 |
| commit | c7e17632237219090791ba67dd700c2fca432e20 (patch) | |
| tree | f27522c5cb17b88ed7fd487f6e95dbefb8319fe9 /Makefile | |
| parent | 5d52b6321b02840d2a64f1663900f15b7c9f22a2 (diff) | |
| download | riscv-opcodes-c7e17632237219090791ba67dd700c2fca432e20.zip riscv-opcodes-c7e17632237219090791ba67dd700c2fca432e20.tar.gz riscv-opcodes-c7e17632237219090791ba67dd700c2fca432e20.tar.bz2 | |
Factor out opcodes into per-extension files
Diffstat (limited to 'Makefile')
| -rw-r--r-- | Makefile | 4 |
1 files changed, 2 insertions, 2 deletions
@@ -5,12 +5,12 @@ PK_H := ../riscv-pk/machine/encoding.h ENV_H := ../riscv-tests/env/encoding.h OPENOCD_H := ../riscv-openocd/src/target/riscv/encoding.h -ALL_REAL_ILEN32_OPCODES := opcodes +ALL_REAL_ILEN32_OPCODES := opcodes-rv32i opcodes-rv64i opcodes-rv32m opcodes-rv64m opcodes-rv32a opcodes-rv64a opcodes-rv32f opcodes-rv64f opcodes-rv32d opcodes-rv64d opcodes-rv32q opcodes-rv64q opcodes-rv128q opcodes-system ALL_REAL_OPCODES := $(ALL_REAL_ILEN32_OPCODES) opcodes-rvc opcodes-custom opcodes-rvv ALL_OPCODES := opcodes-pseudo $(ALL_REAL_OPCODES) opcodes-rvc-pseudo opcodes-rvv-pseudo -install: $(ISASIM_H) $(PK_H) $(ENV_H) $(OPENOCD_H) inst.chisel instr-table.tex priv-instr-table.tex +install: $(ISASIM_H) inst.chisel instr-table.tex priv-instr-table.tex $(ISASIM_H) $(PK_H) $(ENV_H) $(OPENOCD_H): $(ALL_OPCODES) parse_opcodes encoding.h cp encoding.h $@ |