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author | Andrew Waterman <andrew@sifive.com> | 2023-12-23 15:38:55 -0800 |
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committer | GitHub <noreply@github.com> | 2023-12-23 15:38:55 -0800 |
commit | fb622f2c35257d5615a6b6ff3a9bb674eb45d27d (patch) | |
tree | c74c65cf32e94fac13c516d81adf8a871140dffa | |
parent | 6cf1e72b638f25a4fb394cd81f45f432f9b4fcae (diff) | |
parent | d5f2867929385ff81d92a411cde685a6bbd40a65 (diff) | |
download | riscv-opcodes-fb622f2c35257d5615a6b6ff3a9bb674eb45d27d.zip riscv-opcodes-fb622f2c35257d5615a6b6ff3a9bb674eb45d27d.tar.gz riscv-opcodes-fb622f2c35257d5615a6b6ff3a9bb674eb45d27d.tar.bz2 |
Merge pull request #216 from ved-rivos/ssqosid
Add unratified srmcfg CSR
-rw-r--r-- | csrs.csv | 1 | ||||
-rw-r--r-- | encoding.h | 4 |
2 files changed, 5 insertions, 0 deletions
@@ -70,6 +70,7 @@ 0x157, "sireg6" 0x15C, "stopei" 0x180, "satp" +0x181, "srmcfg" 0x5A8, "scontext" 0x200, "vsstatus" 0x204, "vsie" @@ -330,6 +330,10 @@ #define PTE_TABLE(PTE) (((PTE) & (PTE_V | PTE_R | PTE_W | PTE_X)) == PTE_V) +/* srmcfg CSR fields */ +#define SRMCFG_RCID 0x00000FFF +#define SRMCFG_MCID 0x0FFF0000 + #ifdef __riscv #if __riscv_xlen == 64 |