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| author | YenHaoChen <39526191+YenHaoChen@users.noreply.github.com> | 2024-02-16 07:34:31 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-02-15 15:34:31 -0800 |
| commit | cd1623f46d585a3fc60b96e02acf2033c6dfa1a1 (patch) | |
| tree | b6da5c9b2e8a01a441a026ef9cc2943136f985b5 | |
| parent | 4ad822da696642179ee0e7fc1e175fbbb7e35a72 (diff) | |
| download | riscv-opcodes-cd1623f46d585a3fc60b96e02acf2033c6dfa1a1.zip riscv-opcodes-cd1623f46d585a3fc60b96e02acf2033c6dfa1a1.tar.gz riscv-opcodes-cd1623f46d585a3fc60b96e02acf2033c6dfa1a1.tar.bz2 | |
Add CSR fields of hvictl (#228)
| -rw-r--r-- | encoding.h | 6 |
1 files changed, 6 insertions, 0 deletions
@@ -253,6 +253,12 @@ #define JVT_MODE 0x3F #define JVT_BASE (~0x3F) +#define HVICTL_VTI 0x40000000 +#define HVICTL_IID 0x003F0000 +#define HVICTL_DPR 0x00000200 +#define HVICTL_IPRIOM 0x00000100 +#define HVICTL_IPRIO 0x000000FF + #define PRV_U 0 #define PRV_S 1 #define PRV_M 3 |