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| author | Andrew Waterman <andrew@sifive.com> | 2019-11-15 14:36:28 -0800 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2019-11-15 14:36:28 -0800 |
| commit | 2b3905ed85371cc4cecb58730ae34502708de701 (patch) | |
| tree | 9d374a1364691d37b9213c268e3372f8c241cf63 | |
| parent | ad68f73c46c1781bb79353629a23b544607092bb (diff) | |
| download | riscv-opcodes-2b3905ed85371cc4cecb58730ae34502708de701.zip riscv-opcodes-2b3905ed85371cc4cecb58730ae34502708de701.tar.gz riscv-opcodes-2b3905ed85371cc4cecb58730ae34502708de701.tar.bz2 | |
Remove scaled fixed-point multiply-add instructions
See https://github.com/riscv/riscv-v-spec/commit/063b128bd91390c64796fe1e1546a8855fdbaf35
| -rw-r--r-- | opcodes-rvv | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/opcodes-rvv b/opcodes-rvv index 9bab445..1fd53ff 100644 --- a/opcodes-rvv +++ b/opcodes-rvv @@ -225,11 +225,6 @@ vnsra.vx 31..26=0x2d vm vs2 rs1 14..12=0x4 vd 6..0=0x57 vnclipu.vx 31..26=0x2e vm vs2 rs1 14..12=0x4 vd 6..0=0x57 vnclip.vx 31..26=0x2f vm vs2 rs1 14..12=0x4 vd 6..0=0x57 -vwsmaccu.vx 31..26=0x3c vm vs2 rs1 14..12=0x4 vd 6..0=0x57 -vwsmacc.vx 31..26=0x3d vm vs2 rs1 14..12=0x4 vd 6..0=0x57 -vwsmaccus.vx 31..26=0x3e vm vs2 rs1 14..12=0x4 vd 6..0=0x57 -vwsmaccsu.vx 31..26=0x3f vm vs2 rs1 14..12=0x4 vd 6..0=0x57 - # OPIVV vadd.vv 31..26=0x00 vm vs2 rs1 14..12=0x0 vd 6..0=0x57 vsub.vv 31..26=0x02 vm vs2 rs1 14..12=0x0 vd 6..0=0x57 @@ -274,9 +269,6 @@ vwredsumu.vs 31..26=0x30 vm vs2 rs1 14..12=0x0 vd 6..0=0x57 vwredsum.vs 31..26=0x31 vm vs2 rs1 14..12=0x0 vd 6..0=0x57 vdotu.vv 31..26=0x38 vm vs2 rs1 14..12=0x0 vd 6..0=0x57 vdot.vv 31..26=0x39 vm vs2 rs1 14..12=0x0 vd 6..0=0x57 -vwsmaccu.vv 31..26=0x3c vm vs2 rs1 14..12=0x0 vd 6..0=0x57 -vwsmacc.vv 31..26=0x3d vm vs2 rs1 14..12=0x0 vd 6..0=0x57 -vwsmaccsu.vv 31..26=0x3f vm vs2 rs1 14..12=0x0 vd 6..0=0x57 # OPIVI vadd.vi 31..26=0x00 vm vs2 simm5 14..12=0x3 vd 6..0=0x57 |