1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
|
== "Q" Extension for Quad-Precision Floating-Point, Version 2.2
This chapter describes the Q standard extension for 128-bit
quad-precision binary floating-point instructions compliant with the
IEEE 754-2008 arithmetic standard. The quad-precision binary
floating-point instruction-set extension is named "Q"; it depends on
the double-precision floating-point extension D. The floating-point
registers are now extended to hold either a single, double, or
quad-precision floating-point value (FLEN=128). The NaN-boxing scheme
described in <<nanboxing>> is now extended
recursively to allow a single-precision value to be NaN-boxed inside a
double-precision value which is itself NaN-boxed inside a quad-precision
value.
=== Quad-Precision Load and Store Instructions
New 128-bit variants of LOAD-FP and STORE-FP instructions are added,
encoded with a new value for the funct3 width field.
include::images/wavedrom/quad-ls.adoc[]
[[quad-ls]]
//.Quad-precision load and store
FLQ and FSQ are only guaranteed to execute atomically if the effective
address is naturally aligned and XLEN=128.
FLQ and FSQ do not modify the bits being transferred; in particular, the
payloads of non-canonical NaNs are preserved.
=== Quad-Precision Computational Instructions
A new supported format is added to the format field of most
instructions, as shown in <<fpextfmt>>
[[fpextfmt]]
.Format field encoding.
[%autowidth,float="center",align="center",cols="^,^,<",options="header",]
|===
|_fmt_ field |Mnemonic |Meaning
|00 |S |32-bit single-precision
|01 |D |64-bit double-precision
|10 |H |16-bit half-precision
|11 |Q |128-bit quad-precision
|===
The quad-precision floating-point computational instructions are defined
analogously to their double-precision counterparts, but operate on
quad-precision operands and produce quad-precision results.
include::images/wavedrom/quad-compute.adoc[]
[[quad-compute]]
//.Quad-precision computational
=== Quad-Precision Convert and Move Instructions
New floating-point-to-integer and integer-to-floating-point conversion
instructions are added. These instructions are defined analogously to
the double-precision-to-integer and integer-to-double-precision
conversion instructions. FCVT.W.Q or FCVT.L.Q converts a quad-precision
floating-point number to a signed 32-bit or 64-bit integer,
respectively. FCVT.Q.W or FCVT.Q.L converts a 32-bit or 64-bit signed
integer, respectively, into a quad-precision floating-point number.
FCVT.WU.Q, FCVT.LU.Q, FCVT.Q.WU, and FCVT.Q.LU variants convert to or
from unsigned integer values. FCVT.L[U].Q and FCVT.Q.L[U] are RV64-only
instructions. Note FCVT.Q.L[U] always produces an exact result and is unaffected by rounding mode.
include::images/wavedrom/quad-cnvrt-mv.adoc[]
[[quad-cnvrt-mv]]
//.Quad-precision convert and move
New floating-point-to-floating-point conversion instructions are added.
These instructions are defined analogously to the double-precision
floating-point-to-floating-point conversion instructions. FCVT.S.Q or
FCVT.Q.S converts a quad-precision floating-point number to a
single-precision floating-point number, or vice-versa, respectively.
FCVT.D.Q or FCVT.Q.D converts a quad-precision floating-point number to
a double-precision floating-point number, or vice-versa, respectively.
include::images/wavedrom/quad-cnvt-interchange.adoc[]
[[quad-convrt-interchange]]
//.Quad-precision convert and move interchangeably
Floating-point to floating-point sign-injection instructions, FSGNJ.Q,
FSGNJN.Q, and FSGNJX.Q are defined analogously to the double-precision
sign-injection instruction.
include::images/wavedrom/quad-cnvrt-intch-xqqx.adoc[]
[[quad-cnvrt-intch-xqqx]]
//.Quad-precision convert and move interchangeably XQ-QX
FMV.X.Q and FMV.Q.X instructions are not provided in RV32 or RV64, so
quad-precision bit patterns must be moved to the integer registers via
memory.
[NOTE]
====
RV128 will support FMV.X.Q and FMV.Q.X in the Q extension.
====
=== Quad-Precision Floating-Point Compare Instructions
The quad-precision floating-point compare instructions are defined
analogously to their double-precision counterparts, but operate on
quad-precision operands.
include::images/wavedrom/quad-float-compare.adoc[]
[[quad-float-compare]]
//.Quad-precision floatinf-point compare
=== Quad-Precision Floating-Point Classify Instruction
The quad-precision floating-point classify instruction, FCLASS.Q, is
defined analogously to its double-precision counterpart, but operates on
quad-precision operands.
include::images/wavedrom/quad-float-clssfy.adoc[]
[[quad-float-clssfy]]
//.Quad-precision floating point classify
|
