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//# 10 "Zicsr", Control and Status Register (CSR) Instructions, Version 2.0
//## 10.1 CSR Instructions
[wavedrom, ,]
....
{reg: [
{bits: 7, name: 'opcode', attr: 'SYSTEM', type: 8},
{bits: 5, name: 'rd', attr: 'dest', type: 2},
{bits: 3, name: 'func3', attr: ['CSRRW', 'CSRRS', 'CSRRC'], type: 8},
{bits: 5, name: 'rs1', attr: 'source', type: 4},
{bits: 12, name: 'csr', attr: 'source/dest', type: 4},
]}
....
[wavedrom, ,svg]
....
{reg: [
{bits: 7, name: 'opcode', attr: 'SYSTEM', type: 8},
{bits: 5, name: 'rd', attr: 'dest', type: 2},
{bits: 3, name: 'func3', attr: ['CSRRWI', 'CSRRSI', 'CSRRCI'], type: 8},
{bits: 5, name: 'rs1', attr: 'uimm[4:0]', type: 3},
{bits: 12, name: 'csr', attr: 'source/dest', type: 4},
]}
....
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