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// [wavedrom, ,svg] .... {reg: [ {bits: 2, name: 'op', type: 8, attr: ['2','C1'],}, {bits: 5, name: 'imm[4:0]', type: 4, attr: ['5','0'],}, {bits: 5, name: 'rd/rs1', type: 8, attr: ['5','0'],}, {bits: 1, name: 'imm[5]', type: 8, attr: ['1','0'],}, {bits: 3, name: 'funct3', type: 8, attr: ['3','C.NOP'],}, ]} ....