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AgeCommit message (Expand)AuthorFilesLines
2019-07-20Isolate N extension into its own chapter in the priv specn-extAndrew Waterman1-139/+112
2019-07-18Fix poor figure placementAndrew Waterman1-2/+3
2019-07-12Improve description of mtimecmp code sequenceAndrew Waterman1-1/+3
2019-07-12Clarify that mtime writes/ticks can also clear MTIPAndrew Waterman1-2/+3
2019-07-09Clarify that mtvec is WARL (#406)Alex Bradbury1-1/+1
2019-06-25Touch up the mcycle textAndrew Waterman1-9/+10
2019-06-25Merge branch 'master' into counterinhibit-smtAndrew Waterman1-21/+14
2019-06-25ECALL and EBREAK don't retireAndrew Waterman1-0/+2
2019-06-25Don't mandate that multiple harts on a core share mcyclePalmer Dabbelt1-1/+1
2019-06-25Indicate that mcycle can be shared between hartsPalmer Dabbelt1-2/+6
2019-06-24MPRV affects endiannessAndrew Waterman1-2/+3
2019-06-24Remove endianness dependence on PTE.UAndrew Waterman1-19/+4
2019-06-24Clarify that, if all PMPs are OFF, all S/U accesses failAndrew Waterman1-0/+5
2019-06-21Clarify PC behavior when XLEN < max supported XLENAndrew Waterman1-0/+2
2019-06-21State endianness assumption of code exampleAndrew Waterman1-2/+3
2019-06-21Clarify SBE/SFENCE interactionAndrew Waterman1-1/+12
2019-06-21Need SFENCE after change to SBEAndrew Waterman1-0/+3
2019-06-21SpellingAndrew Waterman1-1/+1
2019-06-21Bi-endian systems reset as little-endianAndrew Waterman1-0/+2
2019-06-21Add commentaryAndrew Waterman1-0/+9
2019-06-19Add endianness control proposal to priv specAndrew Waterman1-29/+147
2019-05-31Tiny editorial fixPhilipp Wagner1-1/+1
2019-04-19Don't reference the SBI in normative privileged spec sectionsAndrew Waterman1-14/+6
2019-04-11clarify in commentary that environment break == EBREAKAndrew Waterman1-1/+1
2019-04-11Explain when sideleg/sedeleg must existAndrew Waterman1-0/+6
2019-04-08Elucidate two uses of the word "error"Andrew Waterman1-1/+1
2019-04-05mtime is a read-write registerAndrew Waterman1-1/+1
2019-03-28mhpmcounters are WARLAndrew Waterman1-1/+7
2019-03-26Minor grammar fix (#357)pdonahue-ventana1-1/+1
2019-03-15Add more MXR/SUM commentaryAndrew Waterman1-0/+6
2019-03-13Improve synchronous exception priority table/descriptionAndrew Waterman1-18/+19
2019-03-13Clarify which exception is raised in two casesAndrew Waterman1-2/+2
2019-03-12Specify synchronous exception priority orderingAndrew Waterman1-0/+46
2019-03-07Update mcause/scause tables to allocate some custom exception causesAndrew Waterman1-6/+11
2019-02-22Add misa to reset sectionAndrew Waterman1-1/+5
2019-02-13Fix typos. (#340)Josh Scheid1-2/+2
2019-02-01Make the mcause table easier to find.Prashanth Mundkur1-2/+2
2019-01-29Fix a couple of typos and inconsistencies. (#334)Prashanth Mundkur1-6/+6
2019-01-28Forgot to indicate that mstatus.FS is a WARL field.Andrew Waterman1-1/+1
2019-01-22Nest mstatus subsectionsAndrew Waterman1-5/+5
2018-12-27Clarify that writing pmpcfg does not alter pmpaddr's underlying valueAndrew Waterman1-0/+4
2018-12-26Rephrase NA4 restrictionAndrew Waterman1-1/+1
2018-12-21tweaksAndrew Waterman1-3/+2
2018-12-10fix typosAndrew Waterman1-2/+2
2018-12-04Version of priv spec ready for ratification processAndrew Waterman1-1/+11
2018-12-03Mostly remove RV128 from priv spec, for nowAndrew Waterman1-26/+30
2018-12-03Remove config string chapter for nowAndrew Waterman1-6/+2
2018-12-03M-mode editsAndrew Waterman1-27/+22
2018-12-02Remove PLIC chapter from privileged specAndrew Waterman1-2/+1
2018-12-02WIP on M-mode chapterAndrew Waterman1-29/+10
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