index
:
riscv-isa-manual.git
1437-update-generated-filenames-to-be-more-desciptive
1454-fix-merge-and-release-workflow
1532-lack-of-list-of-figures-tables
Sv57
Svinval
Svnapot
Svpbmt
antora-refactor
aswaterman-patch-1
atomics-wording-v2
bonzini-hpmdelta
cnop
convert2adoc_rvwmo
csr-wip
dev/beeman/smctr-ssctr
fix-adoc-IDs
fix-fedora-build
hypervisor
kersten1-patch-3
latex
lrsc
main
misa-ztso
msip
mtime-optional
n-ext
pmp
ratified-priv-v1.11-sans-hypervisor-draft
sail-inclusion-example
sfence-asid
smpmpmt
svkt
tmp
trap
v20240411
virtual-memory
wfmi
zam
zfb
ztso-ratification
Unnamed repository; edit this file 'description' to name the repository.
root
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
Age
Commit message (
Expand
)
Author
Files
Lines
2020-08-23
Clarify description of CB format
Andrew Waterman
1
-2
/
+2
2020-08-20
Add marchid for SERV (#569)
Olof Kindgren
1
-0
/
+1
2020-08-18
Remove assembly manual
Andrew Waterman
4
-168
/
+10
2020-08-14
Change "reserved for custom" to "designated for custom" (#566)
John Hauser
9
-30
/
+30
2020-08-14
Improve table of conditions for explicit CSR read/write (#564)
John Hauser
1
-15
/
+18
2020-08-14
Improve table of RAS hints for JALR instructions (#563)
John Hauser
1
-10
/
+11
2020-08-14
Improve table of trap characteristics in introduction (#562)
John Hauser
1
-6
/
+8
2020-08-13
Merge pull request #547 from jhauser-us/jhauser-CSRSideEffects3
Andrew Waterman
1
-0
/
+25
2020-08-13
Merge pull request #531 from jhauser-us/jhauser-CSRRules
Andrew Waterman
1
-15
/
+28
2020-08-12
mcounteren only exists if U-mode exists
Andrew Waterman
1
-0
/
+2
2020-08-03
Fix formatting of 2^XLEN
Andrew Waterman
3
-9
/
+9
2020-07-31
Add missing word
Andrew Waterman
1
-1
/
+1
2020-07-31
Clarify that ASID changes are also immediate
Andrew Waterman
1
-0
/
+1
2020-07-31
Clarify that satp.MODE transitions to/from Bare don't require SFENCE.VMA
Andrew Waterman
1
-0
/
+3
2020-07-31
Reserve some satp encodings for custom use
Andrew Waterman
1
-5
/
+11
2020-07-30
Fix Sv48 VALEN typo (#551)
Daniel Lustig
1
-1
/
+1
2020-07-30
Further clarified the program order of CSR accesses
John Hauser
1
-4
/
+10
2020-07-27
Clarify effect on unwritten bits for CSRRS/CSRRC
Andrew Waterman
1
-4
/
+3
2020-07-26
Clarify which implicit reads of the translation structures are allowed
Andrew Waterman
1
-1
/
+2
2020-07-25
tweak
Andrew Waterman
1
-1
/
+1
2020-07-25
Add commentary about caching invalid PTEs
Andrew Waterman
1
-0
/
+7
2020-07-23
Add examples for CSR side effects and indirect effects
John Hauser
1
-0
/
+25
2020-07-22
Clarify what is a side effect of a CSR access (#546)
John Hauser
1
-7
/
+14
2020-07-22
Pmp wording fix (#545)
Stef O'Rear
6
-25
/
+26
2020-07-20
clarify that high counters are RV32I-only
Andrew Waterman
1
-1
/
+1
2020-07-20
Make it explicit that the priv arch requires Zicsr
Andrew Waterman
1
-3
/
+9
2020-07-19
Add missing word
Andrew Waterman
1
-1
/
+1
2020-07-17
Remove redundant phrase from access-/page-fault text
Andrew Waterman
2
-2
/
+2
2020-06-28
Clarifications to the perceived ordering of CSR accesses and their effects
John Hauser
1
-13
/
+20
2020-06-10
Fix preface
Andrew Waterman
1
-2
/
+2
2020-06-10
Priority of misaligned load/store address checks is implementation-defined
Andrew Waterman
2
-1
/
+21
2020-06-04
FADD/FSUB can't raise UF, hence, no PPO dependence
Andrew Waterman
1
-4
/
+4
2020-06-04
Fix unclarity in MPRV definition introduced by 569d07195a8495460f04592d845515...
Andrew Waterman
1
-1
/
+1
2020-05-31
Merge pull request #525 from riscv/64-pmp-entries
Andrew Waterman
3
-28
/
+51
2020-05-22
Extend PMP scheme to support 64 regions
Andrew Waterman
3
-28
/
+51
2020-05-21
Merge pull request #523 from jhauser-us/jhauser-hstatusVTW
Andrew Waterman
1
-21
/
+14
2020-05-18
Clarify that satp.MODE=Bare with satp.LSBs != 0 is unspecified for now
Andrew Waterman
1
-0
/
+3
2020-05-14
Add VTW field to hstatus; improve rules for WFI in virtual modes
John Hauser
1
-21
/
+14
2020-05-14
Merge pull request #518 from jhauser-us/jhauser-virtualinstexception
Andrew Waterman
1
-13
/
+90
2020-05-13
Expand the circumstances that raise virtual instruction exceptions
John Hauser
1
-18
/
+20
2020-05-11
Improve description of RV64 *W instructions
Andrew Waterman
1
-7
/
+8
2020-05-05
Clarify that _coherent_ main memory regions use RVWMO or RVTSO
Andrew Waterman
1
-2
/
+4
2020-05-05
Add virtual instruction exceptions to the hypervisor extension
John Hauser
1
-12
/
+87
2020-04-23
Clarify semantics of sfence.vma with rs1 != 0 (#515)
Jonathan Behrens
1
-2
/
+2
2020-04-22
Clarify that mtimecmp comparison is unsigned
Andrew Waterman
1
-3
/
+4
2020-04-22
Clarify that various reset events are relative to hart reset
Andrew Waterman
1
-4
/
+4
2020-04-17
Clarify that RV64 accesses to mtime/mtimecmp are atomic
Andrew Waterman
1
-0
/
+3
2020-04-16
Make misaligned exception text more generic than RV32
Andrew Waterman
1
-3
/
+3
2020-04-16
Clarify that the EEI defines misaligned FP ld/st behavior
Andrew Waterman
2
-0
/
+5
2020-04-14
Avoid "should" when describing a mandate
Andrew Waterman
1
-2
/
+2
[next]