index
:
riscv-isa-manual.git
1437-update-generated-filenames-to-be-more-desciptive
1454-fix-merge-and-release-workflow
1532-lack-of-list-of-figures-tables
Sv57
Svinval
Svnapot
Svpbmt
antora-refactor
aswaterman-patch-1
atomics-wording-v2
bonzini-hpmdelta
cnop
convert2adoc_rvwmo
csr-wip
dev/beeman/smctr-ssctr
fix-adoc-IDs
hypervisor
kersten1-patch-3
latex
lrsc
main
misa-ztso
msip
mtime-optional
n-ext
pmp
ratified-priv-v1.11-sans-hypervisor-draft
sail-inclusion-example
sfence-asid
smpmpmt
svkt
tmp
trap
v20240411
virtual-memory
wfmi
zam
zfb
ztso-ratification
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2022-06-03
bump Ztso version for ratification
ztso-ratification
Andrew Waterman
2
-2
/
+2
2022-06-03
Define RVV-RVTSO bindings
Andrew Waterman
1
-0
/
+6
2022-06-02
Replaced nonstandard with non-standard.
Krste Asanovic
3
-5
/
+5
2022-05-12
Ztso wordsmithing
Andrew Waterman
1
-1
/
+1
2022-05-02
Improve implemented/enabled text
Andrew Waterman
1
-5
/
+4
2022-05-02
Clarify what is meant by "implemented" (#842)
John Hauser
1
-2
/
+33
2022-04-26
Add single-letter "H" extension to the table
Tsukasa OI
1
-1
/
+2
2022-04-26
Remove multi-letter H* extensions from naming
Tsukasa OI
1
-15
/
+0
2022-04-23
Delete more nonexistent extensions from the naming constraints
Andrew Waterman
1
-1
/
+1
2022-04-23
D extension is implied by V extension (#840)
Tsukasa #01 (a4lg)
1
-1
/
+1
2022-04-23
Strict single-letter extensions on Table 28.1 (Standard ISA extension names) ...
Tsukasa #01 (a4lg)
1
-4
/
+1
2022-04-10
Fix typo: "instruction" -> "instructions" (#834)
Edward Forgacs
1
-1
/
+1
2022-04-04
Fix BOOM URL
Andrew Waterman
1
-1
/
+1
2022-03-28
Add note about FCVT.Q.L[U] never rounding (like FCVT.D.W[U])
Andrew Waterman
1
-1
/
+2
2022-03-18
Fix copy-paste errors in Sv57x4 description
Andrew Waterman
1
-4
/
+4
2022-03-12
improve description of store-conditional failure codes (#827)
Andrew Waterman
1
-3
/
+3
2022-03-01
Svpbmt cannot override vacant PMA regions. (#826)
Paul Donahue
1
-0
/
+2
2022-03-01
Update priv spec contributors
Andrew Waterman
1
-2
/
+2
2022-02-24
Hypervisor: use HFENCE.GVMA after PMP write to synchronize VS-enabled-G-disab...
John Ingalls
1
-8
/
+5
2022-02-23
Improve description of Svnapot
Andrew Waterman
1
-6
/
+6
2022-02-22
Zihintntl: fix chapter label (#821)
Antony Pavlov
1
-1
/
+1
2022-02-17
rocket-chip is hosted at chipsalliance, not freechipsproject
Andrew Waterman
1
-1
/
+1
2022-02-17
Adds CV32E41P to MARCHID (#818)
Ibrahim Abu Kharmeh
1
-0
/
+1
2022-02-08
Make FP conversion/move section names consistent
Andrew Waterman
2
-2
/
+2
2022-01-25
Update priv preface to reflect draft status
Andrew Waterman
1
-0
/
+32
2022-01-25
misa.V means "V" vector extension
Andrew Waterman
1
-1
/
+1
2022-01-25
Remove tentative purpose for reserved misa.B and misa.J bits
Andrew Waterman
1
-2
/
+2
2022-01-20
Merge pull request #815 from a4lg/update-instr-table-20220121
Andrew Waterman
2
-300
/
+306
2022-01-21
Update Instruction Tables based on riscv-opcodes
Tsukasa OI
2
-300
/
+306
2022-01-19
Merge pull request #813 from a4lg/riscv-hints-new-1-20220119
Andrew Waterman
3
-14
/
+34
2022-01-20
Remove "no hints are defined" text in RVC
Tsukasa OI
1
-1
/
+1
2022-01-20
Add Zihintntl hints to HINT Instruction tables
Tsukasa OI
3
-8
/
+28
2022-01-20
Change compressed hint example
Tsukasa OI
1
-2
/
+2
2022-01-20
Replace semicolon with a colon
Tsukasa OI
1
-1
/
+1
2022-01-20
Remove "no hints are defined" text in RV64I
Tsukasa OI
1
-2
/
+2
2022-01-15
Zihintntl: Fix number of hint instruction variants (#812)
Tsukasa #01 (a4lg)
1
-1
/
+1
2022-01-14
hypervisor: Add Sv57 to &x4 address witdth list (#811)
Dylan Reid
1
-1
/
+1
2022-01-10
Incorporate Kruckemyer's feedback on NTL
Andrew Waterman
1
-6
/
+6
2022-01-10
Clarify forbidden execution scenarios in A.1 litmus test (#809)
Daniel Mangum
1
-1
/
+1
2022-01-09
fix formatting
Andrew Waterman
1
-1
/
+1
2022-01-09
Add Zihintntl spec (#810)
Andrew Waterman
3
-0
/
+204
2022-01-09
Clarify HLVX exception types
Andrew Waterman
1
-0
/
+4
2022-01-07
Zhinxmin is ratified, too
Andrew Waterman
1
-1
/
+1
2022-01-06
Remove misleading text about MPRV for less-privileged modes
Andrew Waterman
1
-3
/
+2
2022-01-06
Update version numbers for Zfh/Zfinx
Andrew Waterman
3
-18
/
+7
2021-12-29
Clarify handling of direct and indirect vsatp.MODE writes with Reserved values.
gfavor
1
-4
/
+3
2021-12-29
hypervisor: fix typos (#803)
Dong Du
1
-2
/
+2
2021-12-29
Update GitHub action to build Asciidoc branch (#805)
Stephano Cetola
1
-2
/
+52
2021-12-28
Clarify V=1 [v]satp write behavior
Andrew Waterman
1
-0
/
+2
2021-12-28
add dummy GitHub action (#802)
Stephano Cetola
1
-0
/
+9
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