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2022-09-16More Hauser editszfbAndrew Waterman1-2/+2
2022-09-16Tighten description of FCVTMOD assembly syntaxAndrew Waterman1-2/+2
2022-09-16Tighten description of FCVTMOD exception behaviorAndrew Waterman1-1/+2
2022-09-16FROUND.NX -> FROUNDNXAndrew Waterman1-6/+6
2022-09-16FCVT.MOD -> FCVTMODAndrew Waterman1-3/+3
2022-09-16Reorder Zfa sections per Hauser's feedbackAndrew Waterman1-115/+119
2022-09-15Rename Zfb to Zfa at request of Zfbfmin authorsAndrew Waterman2-6/+6
2022-09-15Replace MAX with 16 in FLI; improve descriptionAndrew Waterman1-15/+24
2022-09-15rtz must be specified in FCVT.MOD.W.D instructionAndrew Waterman1-0/+5
2022-09-15Rename FCVT.JS.W.D to FCVT.MOD.W.DAndrew Waterman1-6/+7
2022-09-15Improve description of FCVT.JS.W.DAndrew Waterman1-2/+2
2022-09-15Improve FLI tableAndrew Waterman1-12/+12
2022-09-06Zfb also contains FLI.{H, S, D, Q}Andrew Waterman1-0/+91
2022-08-24Zfb also contains FCVT.JS.W.DAndrew Waterman1-0/+22
2022-08-19Zfb also contains FROUND[.NX]Andrew Waterman1-2/+37
2022-06-06Add draft of Zfb extensionAndrew Waterman2-0/+100
2022-04-04Fix BOOM URLAndrew Waterman1-1/+1
2022-03-28Add note about FCVT.Q.L[U] never rounding (like FCVT.D.W[U])Andrew Waterman1-1/+2
2022-03-18Fix copy-paste errors in Sv57x4 descriptionAndrew Waterman1-4/+4
2022-03-12improve description of store-conditional failure codes (#827)Andrew Waterman1-3/+3
2022-03-01Svpbmt cannot override vacant PMA regions. (#826)Paul Donahue1-0/+2
2022-03-01Update priv spec contributorsAndrew Waterman1-2/+2
2022-02-24Hypervisor: use HFENCE.GVMA after PMP write to synchronize VS-enabled-G-disab...John Ingalls1-8/+5
2022-02-23Improve description of SvnapotAndrew Waterman1-6/+6
2022-02-22Zihintntl: fix chapter label (#821)Antony Pavlov1-1/+1
2022-02-17rocket-chip is hosted at chipsalliance, not freechipsprojectAndrew Waterman1-1/+1
2022-02-17Adds CV32E41P to MARCHID (#818)Ibrahim Abu Kharmeh1-0/+1
2022-02-08Make FP conversion/move section names consistentAndrew Waterman2-2/+2
2022-01-25Update priv preface to reflect draft statusAndrew Waterman1-0/+32
2022-01-25misa.V means "V" vector extensionAndrew Waterman1-1/+1
2022-01-25Remove tentative purpose for reserved misa.B and misa.J bitsAndrew Waterman1-2/+2
2022-01-20Merge pull request #815 from a4lg/update-instr-table-20220121Andrew Waterman2-300/+306
2022-01-21Update Instruction Tables based on riscv-opcodesTsukasa OI2-300/+306
2022-01-19Merge pull request #813 from a4lg/riscv-hints-new-1-20220119Andrew Waterman3-14/+34
2022-01-20Remove "no hints are defined" text in RVCTsukasa OI1-1/+1
2022-01-20Add Zihintntl hints to HINT Instruction tablesTsukasa OI3-8/+28
2022-01-20Change compressed hint exampleTsukasa OI1-2/+2
2022-01-20Replace semicolon with a colonTsukasa OI1-1/+1
2022-01-20Remove "no hints are defined" text in RV64ITsukasa OI1-2/+2
2022-01-15Zihintntl: Fix number of hint instruction variants (#812)Tsukasa #01 (a4lg)1-1/+1
2022-01-14hypervisor: Add Sv57 to &x4 address witdth list (#811)Dylan Reid1-1/+1
2022-01-10Incorporate Kruckemyer's feedback on NTLAndrew Waterman1-6/+6
2022-01-10Clarify forbidden execution scenarios in A.1 litmus test (#809)Daniel Mangum1-1/+1
2022-01-09fix formattingAndrew Waterman1-1/+1
2022-01-09Add Zihintntl spec (#810)Andrew Waterman3-0/+204
2022-01-09Clarify HLVX exception typesAndrew Waterman1-0/+4
2022-01-07Zhinxmin is ratified, tooAndrew Waterman1-1/+1
2022-01-06Remove misleading text about MPRV for less-privileged modesAndrew Waterman1-3/+2
2022-01-06Update version numbers for Zfh/ZfinxAndrew Waterman3-18/+7
2021-12-29Clarify handling of direct and indirect vsatp.MODE writes with Reserved values.gfavor1-4/+3
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