aboutsummaryrefslogtreecommitdiff
path: root/src/b-st-ext.adoc
diff options
context:
space:
mode:
Diffstat (limited to 'src/b-st-ext.adoc')
-rw-r--r--src/b-st-ext.adoc22
1 files changed, 11 insertions, 11 deletions
diff --git a/src/b-st-ext.adoc b/src/b-st-ext.adoc
index 7b0a0a5..9605aa8 100644
--- a/src/b-st-ext.adoc
+++ b/src/b-st-ext.adoc
@@ -912,7 +912,7 @@ common operations in cryptographic workloads.
| ✓
| ✓
-| rev.b
+| brev8
| <<insns-revb>>
| &#10003;
@@ -984,12 +984,12 @@ latency does not depend on the (secret) data being operated on.
|&#10003;
|&#10003;
-|xperm.n _rd_, _rs1_, _rs2_
+|xperm4 _rd_, _rs1_, _rs2_
|<<#insns-xpermn>>
|&#10003;
|&#10003;
-|xperm.b _rd_, _rs1_, _rs2_
+|xperm8 _rd_, _rs1_, _rs2_
|<<#insns-xpermb>>
|===
@@ -2569,13 +2569,13 @@ Included in::
<<<
[#insns-revb,reftext="Reverse bits in bytes"]
-==== rev.b
+==== brev8
Synopsis::
Reverse the bits in each byte of a source register.
Mnemonic::
-rev.b _rd_, _rs_
+brev8 _rd_, _rs_
Encoding::
[wavedrom, , svg]
@@ -3472,13 +3472,13 @@ Included in::
<<<
[#insns-xpermb,reftext="Crossbar permutation (bytes)"]
-==== xperm.b
+==== xperm8
Synopsis::
Byte-wise lookup of indices into a vector in registers.
Mnemonic::
-xperm.b _rd_, _rs1_, _rs2_
+xperm8 _rd_, _rs1_, _rs2_
Encoding::
[wavedrom, , svg]
@@ -3495,7 +3495,7 @@ Encoding::
....
Description::
-The xperm.b instruction operates on bytes.
+The xperm8 instruction operates on bytes.
The _rs1_ register contains a vector of XLEN/8 8-bit elements.
The _rs2_ register contains a vector of XLEN/8 8-bit indexes.
The result is each element in _rs2_ replaced by the indexed element in _rs1_,
@@ -3533,13 +3533,13 @@ Included in::
<<<
[#insns-xpermn,reftext="Crossbar permutation (nibbles)"]
-==== xperm.n
+==== xperm4
Synopsis::
Nibble-wise lookup of indices into a vector.
Mnemonic::
-xperm.n _rd_, _rs1_, _rs2_
+xperm4 _rd_, _rs1_, _rs2_
Encoding::
[wavedrom, , svg]
@@ -3556,7 +3556,7 @@ Encoding::
....
Description::
-The xperm.n instruction operates on nibbles.
+The xperm4 instruction operates on nibbles.
The _rs1_ register contains a vector of XLEN/4 4-bit elements.
The _rs2_ register contains a vector of XLEN/4 4-bit indexes.
The result is each element in _rs2_ replaced by the indexed element in _rs1_,