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| -rw-r--r-- | src/memory.tex | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/memory.tex b/src/memory.tex index 5444b5c..08fca50 100644 --- a/src/memory.tex +++ b/src/memory.tex @@ -801,7 +801,7 @@ Consider Figure~\ref{fig:litmus:addrpo}: RVWMO does not currently attempt to formally describe how FENCE.I, SFENCE.VMA, I/O fences, and PMAs behave. All of these behaviors will be described by future formalizations. -In the meantime, the behavior of FENCE.I is described in Section~\ref{sec:fence}, the behavior of SFENCE.VMA is described in the RISC-V Instruction Set Privileged Architecture Manual, and the behavior of I/O fences and the effects of PMAs are described below. +In the meantime, the behavior of FENCE.I is described in Chapter~\ref{chap:zifencei}, the behavior of SFENCE.VMA is described in the RISC-V Instruction Set Privileged Architecture Manual, and the behavior of I/O fences and the effects of PMAs are described below. \subsection{Coherence and Cacheability} |